AS3715 datasheet(72/159 Pages) AMSOSRAM

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ams Datasheet

Page 71

[v1-03] 2015-Aug-10

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AS3715 − Detailed Description – System Functions

Interrupt Generation

Description

The interrupt controller generates an interrupt request for the

host controller as soon as one or more of the bits in the Interrupt

1 to 3 register are set by pulling high pin INT (INT has to be

selected as GPIO output function). The output polarity can be

changed to active low (XINT ) by using the gpioX_invert bit of

the selected GPIO. All the interrupt sources can be enabled in

the Interrupt Mask 1 to 3 register. The Interrupt 1 to 3 registers

are cleared automatically after the host controller has read

them. To prevent the AS3715 device from losing an interrupt

event, the register that is read is captured before it is

transmitted to the host controller via the serial interface. As

soon as the transmission of the captured value is complete a

logical AND operation with the bit wise inverted captured value

is applied to the register to clear all interrupt bits that have

already been transmitted. Clearing the read interrupt bits takes

2 clock cycles, a read access to the same register before the

clearing process has completed will yield a value of ‘0’. Note that

an interrupt that has been present at the previous read access

will be cleared as well in case it occurs again before the clearing

process has completed.

AS3715 数据表(PDF) 72 Page - ams-OSRAM AG