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AS3715 数据表(PDF) 100 Page - ams-OSRAM AG |
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AS3715 数据表(HTML) 100 Page - ams-OSRAM AG |
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100 / 159 page  ams Datasheet Page 99 [v1-03] 2015-Aug-10 Document Feedback AS3715 − Register Description Figure 107: GPIOctrl_sd Addr:25h GPIOctrl_sd Bit Bit Name Default Access Bit Description 7:6 gpio_ctrl_sd4 b00 RW_SM Enable GPIO control of DCDC SD4. GPIO ctrl only enabled, if sd4_vsel>0 0 : No GPIO control 1 : Controlled by GPIO1 2 : Controlled by GPIO2 3 : Controlled by GPIO3 5:4 gpio_ctrl_sd3 b00 RW_SM Enable GPIO control of DCDC SD3. GPIO ctrl only enabled, if sd3_vsel>0 0 : No GPIO control 1 : Controlled by GPIO1 2 : Controlled by GPIO2 3 : Controlled by GPIO3 3:2 gpio_ctrl_sd2 b00 RW_SM Enable GPIO control of DCDC SD2. GPIO ctrl only enabled, if sd2_vsel>0 0 : No GPIO control 1 : Controlled by GPIO1 2 : Controlled by GPIO2 3 : Controlled by GPIO3 1:0 gpio_ctrl_sd1 b00 RW_SM Enable GPIO control of DCDC SD1. GPIO ctrl only enabled, if sd1_vsel>0 0 : No GPIO control 1 : Controlled by GPIO1 2 : Controlled by GPIO2 3 : Controlled by GPIO3 |
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