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AS3715 数据表(PDF) 123 Page - ams-OSRAM AG |
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AS3715 数据表(HTML) 123 Page - ams-OSRAM AG |
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123 / 159 page ![]() Page 122 ams Datasheet Document Feedback [v1-03] 2015-Aug-10 AS3715 − Register Description Figure 143: GPIO8_7control Figure 144: ENsignal_in Addr:63h GPIO8_7control Bit Bit Name Default Access Bit Description 0gpio7_invert 0 RW Invert GPIO input/output 0 : Normal mode 1 : Invert input or output 3:1 gpio7_mode b011 RW Selects the GPIO mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : Output/Input (open drain, only NMOS is active) 3 : ADC input (Tristate) 4 : Input with pullup 5 : Input with pulldown 6 : Output/Input open drain (NMOS) with pullup, 7 : ADC input with pulldown 4gpio8_invert 0 RW Invert GPIO input/output 0 : Normal mode 1 : Invert input or output 7:5 gpio8_mode b011 RW Selects the GPIO mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : Output/Input (open drain, only NMOS is active) 3 : ADC input (Tristate) 4 : Input with pullup 5 : Input with pulldown 6 : Output/Input open drain (NMOS) with pullup, 7 : ADC input with pulldown Addr:67h ENsignal_in Bit Bit Name Default Access Bit Description 0 en1_in 0 RO This bit reflects the logic level of the EN1 pin 1 en2_in 0 RO This bit reflects the logic level of the EN2 pin 2 en3_in 0 RO This bit reflects the logic level of the EN3 pin 3 en4_in 0 RO This bit reflects the logic level of the EN4 pin |
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