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R5F10DMDCLFB 数据表(PDF) 26 Page - Renesas Technology Corp |
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R5F10DMDCLFB 数据表(HTML) 26 Page - Renesas Technology Corp |
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26 / 139 page ![]() RL78/D1A 1. OUTLINE R01DS0463EJ0120 Rev. 1.20 Page 26 of 135 Mar 31, 2026 (4/4) Item 100-pin 128-pin Serial interface CSI 3 ch UART - 1 ch Simplified IIC 1 ch LIN-UART 2 ch aFCAN 1 ch 2 ch Multiplier and divider/multiply accumulator • 16-bits × 16 bits = 32 bits (Unsigned or signed) • 32-bits ÷ 32 bits = 32 bits (Unsigned) • 16-bits × 16 bits + 32 bits = 32 bits (Unsigned or signed) DMA controller 4 ch Vectored interrupt sources Internal 49 53 External 8 Software 1 Debugger 1 LCD controller driver Bias Static, 1/3 bias, 1/3 or 1/4 duty SEG × COM 53 × 4 54 × 4 LCD Bus I/F - Provided (8 bit, RD, WR) Sound generator 1 channel Stepper motor controller/driver (with ZPD) 4 ch Safety function FLASH memory CRC calculation Provided RAM parity bit error detection Provided IIlegal-memory access detection Provided Frequency detection Provided Clock monitor Provided Reset • Reset by RESET ____________ pin • Internal reset by watchdog timer • Internal reset by power-on-reset • Internal reset by voltage detector • Internal reset by illegal instruction execution • Internal reset by RAM parity error • Internal reset by illegal-memory access • Internal reset by clock monitor Power on reset (POR) Power on reset: 1.51 V ± 0.06 V Power down reset: 1.50 V ± 0.06 V Voltage detector Rising edge detection voltage = 2.81 to 4.06 V (6 step) Falling edge detection voltage = 2.75 to 3.98 V (6 step) On-chip debug function Provided Power supply voltage VDD = 2.7 to 5.5 V Operating ambient temperature J grade products:TA = -40 to +85 °C, L grade products: TA = -40 to +105 °C <R> <R> |
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