MK68901 datasheet(8/33 Pages) STMICROELECTRONICS

8 / 33 page

Figure 10 : A Conceptual Circuit of an Interrupt Channel.

There are two end-of-interrupt modes : the automat-

ic end-of-interrupt mode and the software end-of-in-

terrupt mode. The mode is selected by writing a one

or a zero to the S bit of the Vector Register (VR). If

the S bit of the VR is a one, all channels operate in

the software end-of-interrupt mode. If the S bit is a

zero, all channels operate in the automatic end-of-

interrupt mode, and a reset is held on all in-service

bits. In the automatic end-of-interrupt mode, the

pending bit is cleared when that channel passes its

vector. At that point, no further history of that inter-

rupt remains in the MK68901 MFP. In the software

end-of-interrupt mode, the in-service bit is set and

the pending bit is cleared when the channel passes

its vector. With the in-service bit set, no lower priority

channel is allowed to request an interrupt or to pass

its vector during an acknowledge sequence ; how-

ever, a lower priority channel may still receive an in-

terrupt and latch it into the pending bit. A higher prio-

rity channel may still request an interrupt and be ac-

knowledged. The in-service bit of a particular chan-

nel may be cleared by writing a zero to the corre-

sponding bit in ISRA or ISRB. Typically, this will be

done at the conclusion of the interrupt routine just

before the return. Thus no lower priority channel will

be allowed to request service until the higher priority

channel is complete, while channels of still higher

priority will be allowed to request service. While the

in-service bit is set, a second interrupt on that chan-

nel maybe received and latched into the pending bit,

though no service request will be made in re-

sponse to the second interrupt until the in-service bit

is cleared. ISRA and ISRB may be read at any time.

Only a zero may be written into any bit of ISRA and

ISRB ; thus the in-service bits may be cleared in soft-

ware but cannot be set in software. This allows any

one bit to be cleared, without altering any other bits,

simply by writing all ones except for the bit position

to be cleared to ISRA or ISRB, as with IPRA and

IPRB.

Figure 11 a : A Conceptual Circuit of the MK68901 MFP Daisy Chaining.

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