Data Sheet

ADAQ8092

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

analog.com

Rev. 0 | 13 of 30

Table 7. Pin Function Descriptions (Double Data-Rate CMOS Output Mode)

Pin No.

Mnemonic

Type1

Description

is read back from the serial programming mode registers and can be latched on the

falling edge of SCK. SDO is an open-drain NMOS output that requires an external 2

kΩ pull-up resistor to 1.8 V to 3.3 V. If readback from the serial programming mode

registers is not needed, the pull-up resistor is not necessary and SDO can be left

unconnected.

In parallel programming mode (PAR/SER = VDD), SDO can be used together with SDI

to power down the device (see Table 11). When used as an input, SDO can be driven

with 1.8 V to 3.3 V logic through a 1 kΩ series resistor.

D5

SCK

DI

Serial Interface Clock Input or Digital Output Mode Control. In serial programming

mode (PAR/SER = 0 V), SCK is the serial interface clock input. In parallel

programming mode (PAR/SER = VDD), SCK controls the digital output mode (see

Table 11). SCK can be driven with 1.8 V to 3.3 V logic.

D7, B9, C8, A8, B7, C6, A6

D1_0_1, D1_2_3, D1_4_5,

D1_6_7, D1_8_9, D1_10_11,

D1_12_13

DO

Channel 1 Double Data-Rate Digital Outputs. Two data bits are multiplexed onto

each output pin. The even data bits (D0, D2, D4, D6, D8, D10, D12) appear when

CLKOUT+ is low. The odd data bits (D1, D3, D5, D7, D9, D11, D13) appear when

CLKOUT+ is high.

D8

OVDD

DO

ADC Output-Driver Power Supply. OVDD has a 0.1 µF decoupling capacitor.

D9

CLKOUT+

DO

Data Output Clock. The digital outputs normally transition at the same time as the

falling edge of CLKOUT+. The phase of CLKOUT+ can also be delayed relative to the

digital outputs by programming the serial programming mode registers.

E1

PD2

AO

Power-Down Pin, Channel 2. When this pin is floating or directly connected to VCC,

the Channel 2 ADC driver is in the normal (active) operating mode. When this pin is

connected to GND, the Channel 2 ADC driver is in a low-power shutdown state with

high-Z outputs.

E4

CS

DI

Serial Interface Chip-Select Input or Clock Duty-Cycle Stabilizer Control. In serial

programming mode, (PAR/SER = 0 V), CS is the serial interface chip-select input.

When CS is low, SCK is enabled for shifting data on SDI into the serial programming

mode registers. In parallel programming mode (PAR/SER = VDD), CS controls the

clock duty-cycle stabilizer (see Table 11). CS can be driven with 1.8 V to 3.3 V logic.

E5

SDI

DI

Serial Interface Data Input or Power-Down Pin. In serial programming mode

(PAR/SER = 0 V), SDI Is the serial interface data input. Data on SDI is clocked

into the serial programming mode registers on the rising edge of SCK. In parallel

programming mode (PAR/SER = VDD), SDI can be used together with SDO to power

down the device (see Table 11). SDI can be driven with 1.8 V to 3.3 V logic.

E9

CLKOUT−

DO

Inverted Version of CLKOUT+.

F1

IN2P

AI

ADC Driver Noninverting input, Channel 2.

F2

VOCM2I

AI

ADC Driver, Channel 2 Common-Mode Voltage.

F3

VOCM2O

AO

Common-Mode Bias Output, Nominally Equal to VDD/2. Used to bias the common

mode of the analog inputs, Channel 2.

G1

IN2N

AI

ADC Driver Inverting Input, Channel 2.

G2

OUT2N

AO

ADC Driver Inverting Output, Channel 2.

G3

OUT2P

AO

ADC Driver Noninverting Output, Channel 1.

G5

ENC−

DI

Encode Complement Input. Conversion starts on the falling edge. Connect ENC− to

GND for single-ended encode mode.

H2

AIN2N

AI

ADC Inverting Analog Input, Channel 2.

H3

AIN2P

AI

ADC Noninverting Analog Input, Channel 2.

H5

ENC+

DI

Encode Input. Conversion starts on the rising edge.

H7, H9, G8, G6, F8, F6, E6

D2_0_1, D2_2_3, D2_4_5,

D2_6_7, D2_8_9, D2_10_11,

D2_12_13

DO

Channel 2 Double Data-Rate Digital Outputs. Two data bits are multiplexed onto

each output pin. The even data bits (D0, D2, D4, D6, D8, D10, D12) appear when

CLKOUT+ is low. The odd data bits (D1, D3, D5, D7, D9, D11, D13) appear when

CLKOUT+ is high.

1 AI is analog input, AO is analog output, P is power, NC is no connect, DI is digital input, and DO is digital output.