CS4953xx Data Sheet

32-bit Audio Decoder DSP Family

4

®Copyright 2008 Cirrus Logic, Inc.

DS705PP2

1. Documentation Strategy

The CS4953xx Datasheet describes the CS4953xx family of multichannel audio decoders. This document

should be used in conjunction with the following documents when evaluating or designing a system around the

CS4953xx family of processors.

The scope of the CS4953xx Datasheet is primarily the hardware specifications of the CS4953xx family of

devices. This includes hardware functionality, characteristic data, pinout, and packaging information.

The intended audience for the CS4953xx Data Sheet is the system PCB designer, mcu programmer, and the

quality control engineer.

2. Overview

The CS4953xx DSP Family, together with Cirrus Logic’s comprehensive library of audio processing algorithms,

enables the development of next-generation audio solutions. Cirrus Logic also provides a broad array of digital

requirements.

There are two devices in the CS4953xx DSP family. The CS495303 and CS495313 are differentiated by

internal memory size and DSP Firmware. The CS495303 is available in a 128-pin QFP package and the

CS495313 is available in either a 128-pin or 144-pin QFP package. The audio processing features of the

CS495313 are a superset of audio features available in the CS495303. Please refer to Table 2 on page 6 for

the speed and firmware features of each device.

2.1 Migrating from the CS495xx(2) to the CS4953xx

The CS4953xx was designed to provide an easy upgrade path from the CS495xx(2). Although 144-pin

versions of the two devices are virtually identical with respect to external system connection, there are some

small differences the hardware designer should be aware of:

• The PLL supply voltage on the CS4953xx is 3.3V vs. 1.8V on the CS495xx(2).

• The PLL filter topology is simpler when using the CS4953xx rather than the CS495xx(2).

• The CS4953xx adds support for 6-channel DSD input.

• The CS4953xx adds support for TDM mode on both audio input and output ports.

• The CS4953xx does not support external SRAM operation.

• The CS4953xx external SDRAM bus speed is fixed at 150 MHz vs. the 120 MHz max bus speed for the

CS495xx(2). Some firmware modules also support a 75 MHz CS4953xx SDRAM bus speed. Please refer

to AN288 for details.

• The CS4953xx CLKOUT pin can output XTALI or XTALI/2. The CS495xx(2) can only output XTALI.

2.2 Licensing

Licenses are required for all of the 3rd party audio decoding/processing algorithms listed below, including the

application notes. Please contact your local Cirrus Sales representative for more information.

Table 1. CS4953xx Related Documentation

Document Name

Description

CS4953xx Datasheet

This document

CS4953xx Hardware User’s Manual

Includes detailed system design information including

Typical Connection Diagrams, Boot-Procedures, Pin

Descriptions, Etc.

AN288 - CS4953xx Firmware User’s Manual

Includes detailed firmware design information

including signal processing flow diagrams and control

API information