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ST5092 数据表(PDF) 10 Page - STMicroelectronics |
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ST5092 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 29 page  Table 4: Control Register CR2 Functions 7 6 54 32 10 Function d7 d6 d5 d4 d3 d2 d1 d0 msb lsb Data sent to Receive path or Data received from DR input (1) (1) Significant in companded mode only. Table 5: Control Registers CR3 Functions 7 6 54 32 10 Function d7 d6 d5 d4 d3 d2 d1 d0 msb lsb DX data transmitted (1) (1) Significant in companded mode only Table 6: Control Register CR4 Functions 7 6 54 32 10 Function VS TE SI OE1 OE2 RTE HPB SE 0 0 1 1 0 1 0 1 Transmit input muted MIC1 Selected MIC2 Selected MIC3 Selected * 0 1 Internal sidetone disabled Internal sidetone enabled * 0 0 1 1 0 1 0 1 Receive output muted VFr output selected VLr output selected NOT ALLOWED * 0 1 Ring / Tone to VFr or VLr disabled Ring / Tone to VFr or VLr enabled * 0 1 Receive HP filter enabled Receive HP filter disabled * 0 1 Receive Signal to VFr or VLr disabled Receive Signal to VFr or VLr enabled * *: state at power on initialization X: reserved: write 0 ST5092 10/29 |
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