ST5481

4/18

3.2 - PLL

An internal oscillator provides a 15.36MHz clock for S interface from an external 15.36MHz crystal. From

this clock, the analog block PLL provides a 48MHz clock for USB data rate recovering.

35

GNDD2

I

Digital ground

36

CFG0_TEST0

I/O

CFG0 input for configuration when closed or open mode else test9

37

FLTPLL

In analog

Used to adjust the internal PLL filter

38

XTALOUT

O

Tied to 15.36MHz external crystal

39

XTALIN

I

Tied to 15.36MHz external crystal

40

GPIO0

I/O

General purpose input-output pin 2mA

41

GPIO1

I/O

General purpose input-output pin 2mA

42

GPIO2

I/O

General purpose input-output pin 2mA

43

GPIO3

I/O

General purpose input-output pin 2mA

44

GNDD1

I

Digital ground

45

GPIO4

I/O

General purpose input-output pin 4mA

46

GPIO5

I/O

General purpose input-output pin 4mA

47

GPIO6

I/O

General purpose input-output pin 4mA

48

GPIO7

I/O

General purpose input-output pin 4mA

Pin

Name

Type

Function