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ST5481 数据表(PDF) 6 Page - STMicroelectronics

部件名 ST5481
功能描述  L.O.U.I.S - LOW COST USB ISDN SOLUTION
PDF  18 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST5481 数据表(HTML) 6 Page - STMicroelectronics

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5 - ISDN ACCESS
The device is directly connected to the ISDN line
at S0 interface point.
4 pins are dedicated to this access:
LIP, LIN: receive AMI differential signals inputs
connected to the appropriate transformer LOP,
LON: transmit AMI differential signals outputs
connected to the appropriate transformer.
The S interface access sub-function is clock-
feeded by a 15.36MHz clock signal from the
on-chip oscillator.
I431 recommendation protocols are fully imple-
mented.
The activation / deactivation command manage-
ment is done by the device.
5.1 - ISDN S Interface Synoptic
See Figure 3.
6 - USB ACCESS
The device is directly connected to the USB bus.
4 pins are dedicated to this access:
DP, DM for data exchange. VBUS, GNDBUS as
power lines.
The data transfer rate is 12 MBits. The clock is
extracted from the differential lines DP, DM by a
digital PLL from a 48MHz internal clock. This
48MHz clock is created from the 15.36MHz clock.
The USB protocol is fully implemented following
the 1.0 USB specification.
6.1 - USB Normalization
This specification refers to USB normalization
documents:
– Universal Serial Bus Specification revision 1.0
– Universal Serial Bus Common Class Specifica-
tion revision 1.0
– ST5481 belongs to the VENDOR SPECIFIC
DEVICE CLASS and to a vendor specific
subclass defined as ISDN MODEM DEVICE
SUBCLASS.
It presents ONE INTERFACE belonging to the
VENDOR SPECIFIC INTERFACE CLASS and a
vendor specific interface subclass defined as
ISDN SOFT MODEM INTERFACE SUBCLASS.
It satisfies to a vendor specific control protocol
called ISDN SOFT MODEM PROTOCOL.
Figure 3 : S-Interface Block Diagram
Line Signal
Rx
Slicers
RXNUM
CONTROL
TXNUM
- Tx multiframe control
- D channel monitoring
- Loopbacks
- Frame construction
- AMI code generation
Detector
- C/I control
- Activation state machine
- Master clocks generation
- D & E channel processing
- Auto threshold controller
- Auto equalizer controller
- Digital PLL, line synchronization
- AMI decoder
- Frame synchronization & polarity check
- Signal ID
- Multiframe control.
Pre Filter &
equalizer
2x6 bits DACs
Line
Driver



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