ST62T28C datasheet(9/84 Pages) STMICROELECTRONICS

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ST62T28C/E28C

MEMORY MAP (Cont’d)

1.3.3 Data Space

Data Space accommodates all the data necessary

for processing the user program. This space com-

prises the RAM resource, the processor core and

peripheral registers, as well as read-only data

such as constants and look-up tables in Program

memory.

1.3.3.1 Data ROM

All read-only data is physically stored in program

memory, which also accommodates the Program

Space. The program memory consequently con-

tains the program code to be executed, as well as

the constants and look-up tables required by the

application.

The Data Space locations in which the different

constants and look-up tables are addressed by the

processor core may be thought of as a 64-byte

window through which it is possible to access the

read-only data stored in Program memory.

1.3.3.2 Data RAM

In ST6228C and ST62E28C devices, the data

space includes 60 bytes of RAM, the accumulator

(A), the indirect registers (X), (Y), the short direct

registers (V), (W), the I/O port registers, the pe-

ripheral data and control registers, the interrupt

option register and the Data ROM Window register

(DRW register).

Additional RAM pages can also be addressed us-

ing banks of 64 bytes located between addresses

00h and 3Fh.

1.3.4 Stack Space

Stack space consists of six 12-bit registers which

are used to stack subroutine and interrupt return

addresses, as well as the current program counter

contents.

Table 3. Additional RAM Banks

Table 4. ST62T28C/E28C Data Memory Space

Device

RAM

ST62T28C/E28C

2 x 64 bytes

DATA RAM BANKS

000h

03Fh

DATA ROM WINDOW AREA

040h

07Fh

X REGISTER

080h

Y REGISTER

081h

V REGISTER

082h

W REGIS TER

083h

DATA RAM

084h

0BFh

PORT A DATA REGISTER

0C0h

PORT B DATA REGISTER

0C1h

PORT C DATA REGISTE R

0C2h

PORT D DATA REGISTE R

0C3h

PORT A DIRECTION REGISTE R

0C4h

PORT B DIRECTION REGISTE R

0C5h

PORT C DIRECT ION REGISTE R

0C6h

PORT D DIRECT ION REGISTE R

0C7h

INTERRUPT OPTION REGISTER

0C8h*

DATA ROM WIND OW REGISTE R

0C9h*

ROM BANK SELECT REGISTE R

0CAh*

RAM BANK SELECT REGISTE R

0CBh*

PORT A OPTION REGISTER

0CCh

PORT B OPTION REGISTER

0CDh

PORT C OPTION REGISTER

0CEh

PORT D OPTION REGISTER

0CFh

A/D DATA REGIS TER

0D0h

A/D CONTROL REGIS TER

0D1h

TIMER 1 PRESCALE R REGISTER

0D2h

TIMER 1 COUNTE R REGISTER

0D3h

TIMER 1 STATUS/CONTROL REGISTER

0D4h

RESERVED

0D5h

UART DATA SHIFT REGISTER

0D6h

UART STATUS CONTROL REGISTER

0D7h

WATCHDOG REGISTER

0D8h

RESERVED

0D9h

I/O INTER RUPT POLARITY REGIS TER

0DAh

SPI INTERRUPT DISAB LE REGISTE R

0DCh*

SPI DATA SHIFT REGISTER

0DDh

RESERVED

0DEh

0E4h

ARTIMER MODE/CONTROL REGIS TER

0E5h

ARTIME R STATUS/CONTROL REGISTER ARSC0

0E6h

ARTIME R STATUS/CONTROL REGISTER ARSC1

0E7h

RESE RVED

0E8h

ARTIMER RELOAD/CAPTURE REGIST ER

0E9h

ARTIMER COMPARE REGISTER

0EAh

. ARTIMER LOAD REGISTER

0EBh

RESE RVED

0ECh

ACCUMULATOR

OFFh

* WRIT E ONLY REGISTER

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