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ST6385 数据表(PDF) 28 Page - STMicroelectronics |
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ST6385 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 84 page ![]() 28/84 ST6365, ST6375, ST6385 ST6367, ST6377, ST6387 I/O PORTS (Cont’d) 4.1.1 Details of I/O Ports When programmed as an input a pull-up resistor (if available) can be switched active under program control. When programmed as an output the I/O port will operate either in the push-pull mode or the open-drain mode according to the hardware fixed configuration as specified below. Port A. PA0-PA3 are available as push-pull when outputs. PA4-PA7 are available as open-drain (no push-pull programmability) capable of withstand- ing 12V (no resistive pull-up in input mode). PA6- PA7 has been specially designed for higher driving capability and are able to sink 25mA with a maxi- mum VOL of 1V. Port B. All lines are configured as push-pull when outputs. Port C. PC0-PC3 are available as open-drain ca- pable of withstanding a maximum VDD+0.3V. PC4-PC7 are avail-able as open-drain capable of withstanding 12V (no resistive pull-up in input mode). Some lines are also used as I/O buffers for signals coming from the on-chip SPI. In this case the final signal on the output pin is equivalent to a wired AND with the programmed data output. If the user needs to use the serial peripheral, the I/ O line should be set in output mode while the open-drain configuration is hardware fixed; the corresponding data bit must set to one. If the latched interrupt functions are used (IRIN, PWRIN) then the corresponding pins should be set to input mode. On ST638x the I/O pins with double or special functions are: – PC0/SCL (connected to the SPI clock signal) – PC1/SDA (connected to the SPI data signal) – PC3/SEN (connected to the SPI enable signal) – PC4/PWRIN (connected to the PWRIN interrupt latch) – PC6/IRIN (connected to the IRIN interrupt latch) All the Port A,B and C I/O lines have Schmitt-trig- ger input configuration with a typical hysteresis of 1V. Table 8. I/O Port Options Selection (Ports A and B only) Note X: Means don’t care. DDR DR Mode Option 0 0 Input With on-chip pull-up resistor 0 1 Input Without on-chip pull-up resistor 1 X Output Output open-drain or push-pull |
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