ST70137 datasheet(12/22 Pages) STMICROELECTRONICS

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ST70137

12/22

CLOCK & RESET INTERFACE

MCLK

35.328 MHz Master Input Clock.

RSTN

Asynchronous

Master

Input

Reset

(active

USB_PCI_SEL = ‘1’).

AFE INTERFACE

AFETXD[3:0]

AFE Transmit Data Nibbl e Bus

The signal changes are synchronized to the rising edge of

MCLK clock signal.

AFERXD[3:0]

AFE Receive Data Nibble Bus

The signal changes are synchronized to the rising edge of

MCLK clock signal.

CLWD

Start of word indication

This signal is the word clock used to enable shift of data.

It occurs on CTRLDOUT signal to indicate the first data of

the nibble sequence. The CLWD frequency is equal to

MCLK/4.

CTRLDOUT

Transmit Control Word Data to AFE

The data is shifted out from internal register on the rising

edge of MCLK during CLWD assertion.

AFESEL

Select ST-70136 [0] or ADSL_C [1].

AFERST

AFE Reset

This

signal

connected

the

internal

PCFW

(USB_PCIN_SEL

[0])

UCFW

registers

(USB_PCIN_SEL = [1]) if AFESEL = [0], or to the Sachem

GPOUT register if AFESEL = [1]. Not usable in USB

mode.

AFEWR / GPIO[ 5]

I/O

L/-

AFE Write control outp ut signal (AFESEL = 0), or Gen-

eral Purpose I/O pin. The selection is performed writing

the proper bit in the PCFW or UCFW (depending on sta-

tus of USB_PCIN_SEL pin) registers. At the power-on or

hardware reset the GPIO[5] function is selected.

CTRLDIN / GPIO[4]

L/-

Receive Control word data from AFE (AFESEL = 0), or

General Purpose I/O pin. The selection is performed writ-

ing the proper bit in the PCFW or UCFW (depending on

status of USB_PCIN_SEL pin) registers. At the power-on

or hardware reset the GPIO[4] function is selected ACTD I

I H Activation Tone Detect [1] (or Wake Up signal).

When PCI IF has been selected, the Low to High transi-

tion of ACTD asserts the PCI_PMEN signal (if this last

has been enabled) and generates an interrupt event.

When USB IF has been selected, the Low to High transi-

tion of ACTD de-asserts the SUSPEND signal and

re-enable the internal ST70137 activity.

SUSPEND

Suspend Mode Indication.

SUSPENDN

Suspend Mode Indication Negated.

PWDN

AFE Power Down.

LDPWDN

Line Driver Power Down [1].

Signal Name

Direction

Init Status

Polarity

Signal Description

PIN DESCRIPTION (continued)

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