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ST72E311 数据表(PDF) 53 Page - STMicroelectronics |
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ST72E311 数据表(HTML) 53 Page - STMicroelectronics |
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53 / 100 page  53/100 ST72E311 ST72T311 SERIAL COMMUNICATIONS INTERFACE (Cont’d) Figure 34. SCI Block Diagram WAKE UP UNIT RECEIVE R CONTRO L SR TRANSMIT CONTROL TDRE TC RDRF IDLE OR NF FE - SCI CONTRO L INTERRUPT CR1 R8 T8 - M WAKE - -- Received Data Register (RDR) Received Shift Register Read Transmit Data Register (TDR) Transmit Shift Register Write RDI TDO (DATA REGIST ER) DR TRANSMIT TER CLOCK RECEIVER CLOCK RECEIVER RATE TRANS MITTER RATE BRR SCP1 fCPU CONTROL CONTRO L SCP0SCT2 SCT1 SCT0 SCR2 SCR1SCR0 /2 /PR /16 CONVEN TIONAL BAUD RATE GENERATOR SBK RWU RE TE ILIE RIE TCIE TIE CR2 53 |
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