ST7LITE0 datasheet(68/122 Pages) STMICROELECTRONICS

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11.4 8-BIT A/D CONVERTER (ADC)

11.4.1 Introduction

The on-chip Analog to Digital Converter (ADC) pe-

ripheral is a 8-bit, successive approximation con-

verter with internal sample and hold circuitry. This

peripheral has up to 5 multiplexed analog input

channels (refer to device pin out description) that

allow the peripheral to convert the analog voltage

levels from up to 5 different sources.

The result of the conversion is stored in a 8-bit

Data Register. The A/D converter is controlled

through a Control/Status Register.

11.4.2 Main Features

8-bit conversion

Up to 5 channels with multiplexed input

Linear successive approximation

Dual input range

–0 to VDD or

– 0V to 250mV

Data register (DR) which contains the results

Conversion complete status flag

On/off bit (to reduce consumption)

Fixed gain operational amplifier (x8) (not

available on ST7LITES5 devices)

11.4.3 Functional Description

11.4.3.1 Analog Power Supply

The block diagram is shown in Figure 43.

VDD and VSS are the high and low level reference

voltage pins.

Conversion accuracy may therefore be impacted

by voltage drops and noise in the event of heavily

loaded or badly decoupled power supply lines.

For more details, refer to the Electrical character-

istics section.

11.4.3.2 Input Voltage Amplifier

The input voltage can be amplified by a factor of 8

by enabling the AMPSEL bit in the ADAMP regis-

ter.

When the amplifier is enabled, the input range is

0V to 250 mV.

For example, if VDD = 5V, then the ADC can con-

vert voltages in the range 0V to 250mV with an

ideal resolution of 2.4mV (equivalent to 11-bit res-

olution with reference to a VSS to VDD range).

For more details, refer to the Electrical character-

istics section.

Note: The amplifier is switched on by the ADON

bit in the ADCCSR register, so no additional start-

up time is required when the amplifier is selected

by the AMPSEL bit.

Figure 43. ADC Block Diagram

CH2

CH1

EOC SPEED ADON

CH0

ADCCSR

AIN0

AIN1

ANALOG TO DIGITAL

CONVERTER

AINx

ANALOG

MUX

RADC

CADC

ADCDR

fADC

HOLD CONTROL

x 1 or

x 8

AMPSEL bit

(ADCAMP Register)

fCPU

DIV 2

DIV 4

SLOW

bit

(ADCAMP Register)

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