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ST7LITE2 数据表(PDF) 48 Page - STMicroelectronics |
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ST7LITE2 数据表(HTML) 48 Page - STMicroelectronics |
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48 / 131 page  ST7LITE2 48/131 I/O PORTS (Cont’d) Table 9. I/O Configurations Notes: 1. When the I/O port is in input configuration and the associated alternate function is enabled as an output, reading the DR register will read the alternate function output status. 2. When the I/O port is in output configuration and the associated alternate function is enabled as an input, the alternate function reads the pin status given by the DR register content. 3. For true open drain, these elements are not implemented. Hardware Configuration NOTE 3 CONDITION PAD VDD RPU EXTERNAL INTERRUPT POLARITY DATA BUS PULL-UP INTERRUPT DR REGISTER ACCESS W R FROM OTHER PINS SOURCE (eix) SELECTION DR REGISTER CONDITION ALTERNATE INPUT ANALOG INPUT To on-chip peripheral COMBINATIONAL LOGIC NOTE 3 PAD RPU DATA BUS DR DR REGISTER ACCESS R/W VDD REGISTER PAD RPU DATA BUS DR DR REGISTER ACCESS R/W VDD ALTERNATE ALTERNATE ENABLE OUTPUT REGISTER BIT From on-chip periphera l NOTE 3 1 |
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