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ST7LITE2 数据表(PDF) 50 Page - STMicroelectronics |
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ST7LITE2 数据表(HTML) 50 Page - STMicroelectronics |
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50 / 131 page ![]() ST7LITE2 50/131 I/O PORTS (Cont’d) 10.7 DEVICE-SPECIFIC I/O PORT CONFIGURATION The I/O port register configurations are summa- rised as follows. Standard Ports PA7:0, PB6:0 Interrupt Ports Ports where the external interrupt capability is selected using the EISR register Table 10. Port Configuration (Standard ports) Note: On ports where the external interrupt capability is selected using the EISR register, the configura- tion will be as follows: Table 11. I/O Port Register Map and Reset Values MODE DDR OR floating input 0 0 pull-up input 0 1 open drain output 1 0 push-pull output 1 1 MODE DDR OR floating input 0 0 pull-up interrupt input 0 1 open drain output 1 0 push-pull output 1 1 Port Pin name Input Output OR = 0 OR = 1 OR = 0 OR = 1 Port A PA7:0 floating pull-up open drain push-pull Port B PB6:0 floating pull-up open drain push-pull Port Pin name Input Output OR = 0 OR = 1 OR = 0 OR = 1 Port A PA7:0 floating pull-up interrupt open drain push-pull Port B PB6:0 floating pull-up interrupt open drain push-pull Address (Hex.) Register Label 7654 3210 0000h PADR Reset Value MSB 11 11 111 LSB 1 0001h PADDR Reset Value MSB 00 00 000 LSB 0 0002h PAOR Reset Value MSB 01 00 000 LSB 0 0003h PBDR Reset Value MSB 11 11 111 LSB 1 0004h PBDDR Reset Value MSB 00 00 000 LSB 0 0005h PBOR Reset Value MSB 00 00 000 LSB 0 1 |
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