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ST9040 数据表(PDF) 17 Page - STMicroelectronics |
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ST9040 数据表(HTML) 17 Page - STMicroelectronics |
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17 / 56 page ![]() N ° Symbol Parameter Value (Note) Unit OSCIN Divided By 2 OSCIN Not Divided By 2 Min. Max. 1 TsA (AS) Address Set-up Time before AS ↑ TpC (2P+1) –22 TWCH+PTpC –18 20 ns 2 ThAS (A) Address Hold Time after AS ↑ TpC –17 TwCL –13 25 ns 3 TdAS (DR) AS ↑ toData Available (read) TpC (4P+2W+4) –52 TpC (2P+W+2) –51 115 ns 4 TwAS AS Low Pulse Width TpC (2P+1) –7 TwCH+PTpC –3 35 ns 5 TdAz (DS) Address Float to DS ↓ t12 12 12 ns 6 TwDSR DS Low Pulse Width (read) TpC (4P+2W+3) –20 TwCH+TpC (2P+W+1) –16 105 ns 7 TwDSW DS Low Pulse Width (write) TpC (2P+2W+2) –13 TpC (P+W+1) –13 70 ns 8 TdDSR (DR) DS ↓ toData Valid Delay (read) TpC (4P+2W-3) –50 TwCH+TpC(2P+W+1) –46 75 ns 9 ThDR (DS) Data to DS ↑ Hold Time (read) 0 0 0 ns 10 TdDS (A) DS ↑ to Address Active Delay TpC –7 TwCL –3 35 ns 11 TdDS (AS) DS ↑ to AS ↓ Delay TpC –18 TwCL –14 24 ns 12 TsR/W (AS) R/W Set-up Time before AS ↑ TpC (2P+1) –22 TwCH+PTpC –18 20 ns 13 TdDSR (R/W) DS ↑ to R/W and Address Not Valid Delay TpC –9 TwCL –5 33 ns 14 TdDW (DSW) Write Data Valid to DS ↓ Delay (write) TpC (2P+1) –32 TwCH+PTpC –28 10 ns 15 ThDS (DW) Data Hold Time after DS ↑ (write) TpC –9 TwCL –5 33 ns 16 TdA (DR) Address Valid to Data Valid Delay (read) TpC (6P+2W+5) –68 TwCH+TpC (3P+W+2) –64 140 ns 17 TdAs (DS) AS ↑ to DS ↓ Delay TpC –18 TwCL –14 24 ns EXTERNAL BUS TIMING TABLE (VDD =5V ± 10%,TA =– 40 °Cto + 85 °C, Cload = 50pF, CPUCLK = 12MHz, unless otherwise specified) EXTERNAL WAIT TIMING TABLE (VDD =5V ± 10%,TA =–40°Cto +85°C, Cload = 50pF, INTCLK = 12MHz, Push-pull output configuration, unless otherwise specified) N ° Symbol Parameter Value (Note) Unit OSCIN Divided By 2 OSCIN Not Divided By 2 Min. Max. 1 TdAs (WAIT) AS ↑ to WAIT ↓ Delay 2(P+1)TpC –29 2(P+1)TpC –29 40 ns 2 TdAs (WAIT) AS ↑ to WAIT ↓ Min. Delay 2(P+W+1)TpC –4 2(P+W+1)TpC –4 80 ns 3 TdAs (WAIT) AS ↑ to WAIT ↓ Max. Delay 2(P+W+1)TpC –29 2(P+W+1)TpC –29 83W+ 40 ns Note: (for both tables) The value in the left hand two columns show the formula used to calculate the timing minimum or maximum from the oscillator clock period, prescale value and number of wait cycles inserted. The value in the right hand two columns show the timing minimum and maximum for an external clock at 24 MHz divided by 2, prescaler value of zero and zero wait status. Legend: TpC =OSCIN Period P = Clock Prescaling Value TwCH =High Level OSCIN half period W = Wait Cycles TwCL =Low Level OSCIN half period ® ST9040 17/56 |
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