STA001

8/20

IF VCO (T = 25°, VDD-VSS = 3V)

LO Freq.

Using a 14.72MHz quartz, Min. and Max.

Values are optional fixed frequency usable

for testing purposes.

111.76

117.08

122.4

MHz

LO Freq.

Using a 14.725MHz quartz, Min. and Max.

Values are optional fixed frequency usable

for testing purposes.

111.8

117.12

122.44

MHz

Freq. control voltage

range

FLT2 pin

0.2

0.2

V

DIGITAL INTERFACE TO MP (SCL, SDA, TLCK) AND XOSEL INTERFACE (T = 25°, VDD-VSS = 3V)

INPUT PARAMETERS (SCL, SDA)

digital input signals

high

V

low

7

V

Input current High

10

µA

Input current Low

-40

µA

Input edge transition

0.1

µs/V

Input resistance

190K

Ω

OUTPUT PARAMETERS (TLCK)

digital output signals

high

0.5

V

low

5

V

Rise time

Cl=5pF

0.4

µs/V

Fall time

Cl=5pF

0.4

µs/V

DIFFERENTIAL DIGITAL INTERFACE (M_CLK1, M_CLK2) (T = 25°, VDD-VSS = 3V)

digital output signals,

V(M_CLK1) -

V(M_CLK2)

high

0.2

V

low

-0.2

V

M_CLK1, M_CLK2

common mode DC voltage

1.12

0.7

V

Rise time

Cl=5pF each pin

10

ns

Fall time

Cl=5pF each pin

10

ns

Output impedance

balanced

500

Ω

ELECTRICAL CHARACTERISTCS (continued)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit