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STA001

XOSEL, CE, TLCK, ENRFOSC TRUTH TABLE (LOW = GND, HIGH = VDD)

M_CLK frequency

Using a 14.72MHz quartz

14.72

MHz

M_CLK frequency

Using a 14.725MHz quartz

14.725

MHz

ADDITIONAL DIGITAL INTERFACE (CE) (T = 25°, VDD-VSS = 3V)

(LOW=GND, HIGH=VDD)

digital input signals

high

8

V

low

3

V

CE power up time

2

µs

CE power down time

6

µs

Pin

Type

Level

Result

CE

input

high

Chip enabled

low

Chip disabled

XOSEL

input

high

Internal Crystal oscillator selected

low

External TCXO connected on REF selected

ENRFOSC

input

high

Internal RF oscillator selected

low

External RF oscillator connected on TK1, NTK1 pins

TLCK

output

high

Synth. locked

low

Synth. unlocked

ADDITIONAL OPTIONAL INTERFACE INFORMATION (REF)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

REF DC voltage

XOSEL low

1.1

0.9

0.7

V

Input resistance

XOSEL low

70K

Ω

ELECTRICAL CHARACTERISTCS (continued)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit