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STA001

November 2002

This is preliminary information on a new product now in development. Details are subject to change without notice.

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SINGLE CHIP RECEIVER FOR SATELLITE

DIGITAL TRANSMISSION

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SUPERHETERODYNE RECEIVER WITH IF

OUTPUT

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HIGH INPUT INTERCEPT POINT, LOW

MIXER NOISE

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54dB IF VGA GAIN RANGE

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ADJUSTABLE RF GAIN

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ADJUSTABLE IF GAIN

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INTEGRATED RF VCO

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INTEGRATED IF VCO

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INTEGRATED SYNTHESIZER

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INTERFACE

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UNREGULATED 2.7 V TO 3.3V VOLTAGE

SUPPLY

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LOW COST EXTERNAL COMPONENTS

DESCRIPTION

The STA001 is an RF IC using STMicroelectronics

HSB2 High Speed Bipolar Technology for one chip so-

lution for the Starman digital satellite radio receiver.

The STA001 is assembled in a TQFP44 package.

The frontend architecture is a double conversion re-

ceiver (see block diagram) .

The chip includes all the RF functions up to low IF

and manages the signals to and from the baseband.

TQFP44

ORDERING NUMBER: STA001

PRODUCT PREVIEW

RF FRONT-END FOR DIGITAL RADIO

BLOCK DIAGRAM

XTAL1, XTAL2

CHANNEL SELECTION

M_CLK

DIFFERENTIAL

SINGLE ENDED

FLT2

TK2, NTK2

LNI, NLNI

SIP, SIN

AGC1, AGC2

OSC

3.68MHz

113.23KHz

SCL

SDA

14.72MHz

PHASE

DETECTOR

CHARGE

PUMP

: 1034

2nd PLL

:130

VCO

1338.14 - 1375.4 MHz

117.0806 MHz

SOP, SON

CHARGE

PUMP

PHASE

DETECTOR

:363.625- 373.75

1st PLL

VCO

RF MIXER

IF1 BUFFER

VGA

IF1 to IF2 MIXER

IF2 BUFFER

FLT1

CE

1.8366 Mhz

TLCK

LOCK

DETECTOR

:4

ENRFOSC

BUFFER

TK1,

NTK1

SUPPLY2 :PLL1 +

Crystal osc .

SUPPLY3 :DIG.

SUPPLY4 :IF1,

IF2 &PLL2

SUPPLY1 :RF

GADJ1, GADJ2

I2CBUS INTERFACE

REF

XOSEL

MUX

PADJ1, PADJ2

LNA

RXI, NRXI