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STA015 数据表(PDF) 34 Page - STMicroelectronics |
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STA015 数据表(HTML) 34 Page - STMicroelectronics |
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34 / 44 page ![]() The STA015 contains 56 consecutive 8-bit regis- ters corresponding to the maximum number of ancillary data that may be contained in MPEG frame. The ANCCOUNT_L and ANCOUNT_H registers contain the number of ancillary data bits available within the current MPEG frame. To perform ancillary data reading a status regis- ter (0xB6 - INTERRUPT_STATUS_REGISTER) is available: bit 0 of this register should be polled by the microcontroller in order to understand when new data are available. 0x7E ANC_DATA_1 ---- --------- ---- --------- ---- --------- ---- --------- 0xB5 ANC_DATA_56 0xB6 ISR 5.3. I/O CELL DESCRIPTION (pinout relative to TQFP44 package) 1) CMOS Tristate Output Pad Buffer, 4mA, with Slew Rate Control / Pin numbers 2, 4, 13, 27, 33, 42, 44 EN A D98AU904 Z OUTPUT PIN MAX LOAD Z 100pF 2) CMOS Bidir Pad Buffer, 4mA, with Slew Rate Control / Pin numbers 3, 31 EN A D98AU905 ZI IO INPUT PIN CAPACITANCE OUTPUT PIN MAX LOAD IO 5pF IO 100pF 3) CMOS Inpud Pad Buffer / Pin numbers 24, 26, 32, 34, 36, 40 A D98AU906 Z INPUT PIN CAPACITANCE A 3.5pF 4) CMOS Inpud Pad Buffer with Active Pull-Up / Pin numbers 22, 25, 28, 38 A D98AU907 Z INPUT PIN CAPACITANCE A 3.5pF 5) CMOS Schmitt Trigger Bidir Pad Buffer with active Pull-up, 4mA, with slew rate control / Pin numbers 14, 16, 18, 20, 35, 37, 39, 41, 43 EN A D00AU1150 ZI IO INPUT PIN CAPACITANCE OUTPUT PIN MAX LOAD IO 5pF IO 100pF STA015-STA015B-STA015T 34/44 |
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