STA015 datasheet(37/44 Pages) STMICROELECTRONICS

部件名	STA015

功能描述	MPEG 2.5 LAYER III AUDIO DECODER WITH ADPCM CAPABILITY

PDF	44 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

37 / 44 page

RESET

D98AU974

treset_low_min

5.4.5. RESET

The Reset min duration (t_reset_low_min) is 100ns

HW RESET

set

PCM OUTPUT

INTERFACE

CONFIGURATION

set

PCM-DIVIDER

PCM-CONF.

PLL FRAC_441_H,

PLL FRAC_441_L,

PLL FRAC_H,

PLL FRAC_L }

{

set

MFS DF_441,

MFSDF }

{

PLL

CONFIGURATION

FOR:

set

PLL CTRL

48, 44.1, 32

29, 22.05, 16

12, 11.025, 8 } KHz

• {

set

SCLK_POL

INPUT SERIAL

CLOCK POLARITY

CONFIGURATION

set

DATA_REQ_ENABLE

DATA REQUEST

PIN ENABLE

set

REQ_POL

DATA REQUEST

POLARITY

CONFIGURATION

RUN

set

• MULTIMEDIA

MODE see

{TAB 5 to TAB12}

THE OVERALL

SETTING STEPS

ARE INCLUDED IN

THE STA015

CONFIGURATION

FILE AND CAN

BE DOWNLOADED

IN ONE STEP.

STM PROVIDES

A SPECIFIC

CONFIGURATION

FILE FOR EACH

SUPPORTED

INPUT CLOCK

FREQUENCY

D00AU1146

5.5. CONFIGURATION FLOW

STA015-STA015B-STA015T

37/44

STA015 数据表(PDF) 37 Page - STMicroelectronics

STA015 数据表(HTML) 37 Page - STMicroelectronics

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STA015 数据表(PDF) 37 Page - STMicroelectronics

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