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TAS5701PAP 数据表(PDF) 20 Page - Texas Instruments |
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TAS5701PAP 数据表(HTML) 20 Page - Texas Instruments |
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20 / 26 page ![]() Gain Control DEVICE PROTECTION SYSTEM Short-Circuit Protection Overtemperature Protection Undervoltage Protection (UVP) and Power-On Reset (POR) TAS5701 SLOS559 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com The gain of the DAP is selected via two external gain pins (GAIN_0 and GAIN_1). Table 2 lists the corresponding channel gain (for ALL channels) for GAIN_0 and GAIN_1 settings. Individual channel gain is not possible. Changes to the GAIN_x terminals are latched in immediately on a rising edge of RESET. Changes to the GAIN_x terminals while RESET is high are not allowed. Table 2. Gain Control GAIN_1 GAIN_0 CHANNEL GAIN (dB) 0 0 0 0 1 6 1 0 12 1 1 18 The TAS5701 contains advanced protection circuitry carefully designed to facilitate system integration and ease of use, as well as to safeguard the device from permanent failure due to a wide range of fault conditions such as short circuits, overtemperature, and undervoltage. The TAS5701 responds to a fault by immediately setting the power stage in a high-impedance (Hi-Z) state and reporting the error on the FAULT pin (FAULT = 0); the device automatically recovers when the fault condition has been removed. The device has independent, fast-reacting current detectors on all high-side and low-side power-stage FETs. The detector outputs are closely monitored by a protection system. If a high-current condition situation exists, i.e., the power stage outputs are shorted, the protection system triggers a latching shutdown, resulting in the power stage being set in the high-impedance (Hi-Z) state and FAULT going low. Overcurrent protection is not independent for half-bridges A and B and, respectively, C and D. That is, if the bridge-tied load between half-bridges A and B causes an overcurrent fault, half-bridges A, B, C, and D are shut down. If the device junction temperature exceeds 150°C (nominal), the device is put into thermal shutdown, resulting in all half-bridge outputs being set in the high-impedance (Hi-Z) state and FAULT going low. Once the temperature decreases 30°C (typical), the device resumes normal operation. The UVP and POR circuits of the TAS5701 fully protect the device in any power-up/down and brownout situation. While powering up, the POR circuit resets the protection circuitry and ensures that all circuits are fully operational when the VDD and GVDD_X supply voltages reach 9.6 V (typical). Although GVDD_x and VDD pins are independently monitored, a supply voltage drop below the UVP threshold on any VDD or GVDD_x pin results in all outputs immediately being set in the high-impedence (Hi-Z) state and FAULT pin being asserted low. The device automatically resumes operation when all supply voltages have increased above the UVP threshold. 20 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5701 |
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