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STE100 数据表(PDF) 64 Page - STMicroelectronics

部件名 STE100
功能描述  PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY 5V
PDF  66 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STE100 数据表(HTML) 64 Page - STMicroelectronics

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Table 24. 10BASE-T Normal Link Pulse(NLP) Timings Specifications
Figure 21. Normal Link Pulse timings
Table 25. Auto-Negotiation Fast Link Pulse(FLP) Timings Specifications
Figure 22. Fast Link Pulse timing
Table 26. 100BASE-TX Transmitter AC Timings Specification
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Units
NLP Width
10Mbps
100
ns
NLP Period
10Mbps
8
24
ms
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Units
Tflpw
FLP Width
100
Clock pulse to clock pulse period
111
125
139
Clock pulse to Data pulse period
55.5
62.5
69.5
Number of pulses in one burst
17
33
Burst Width
2
FLP Burst period
8
16
24
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Units
Tjit
TDP-TDN Differential Output
Peak Jitter
1.4
ps
Tnpw
Tnpc



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