STE100P datasheet(14/29 Pages) STMICROELECTRONICS

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STE100P

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ENRZI

Enable the conversions between NRZ and NRZI.

0: disable the data conversion between NRZ and NRZI.

1: enable the data conversion of NRZI to NRZ in receiving and

NRZ to NRZI in transmitting.

R/W

EN4B5B

Enable 4B/5B encoder and decoder

0: the 4B/5B encoder and decoder are bypassed

1: the 4B/5B encoder and decoder are enabled..

R/W

ISOTX

Transmit Isolation. When 1, isolate from MII and tx+/-. The bit

will be set to one if the PHY address is set to 00000 at power-

up/reset This bit must be 0 for normal operation

R/W

4~2

CMODE

Reporting of current operation mode of transceiver.

000: in auto-negotiation

001: 10Base-T half duplex

010: 100Base-TX half duplex

011: reserved

100: reserved

101: 10Base-T full duplex

110: 100Base-TX full duplex

111: isolation, auto-negotiation disable

000

DISMLT

Disable MLT3.

0: the MLT3 encoder and decoder are enabled.

1: the MLT3 encoder and decoder are bypassed.

R/W

DISCRM

Disable Scramble.

0: the scrambler and de-scrambler is enabled.

1: the scrambler and de-scrambler are disabled.

R/W

PR20- XMC, XCVR Mode control

15~12

---

Reserved

Long Distance mode of 10BASE-T.

0: normal squelch level.

1: reduces 10Base-T squelch level for extended cable length.

As the length of the cable increases, so does the current.

R/W

10~8

---

Reserved

7~3

PAD4:0

PHY Address [4:0]:

The values of the PAD[4:0] pins are latched to this register at

power-up/reset. The first PHY address bit transmitted or

received is the MSB of the address (bit 4). A station

management entity connected to multiple PHY entities must

know the appropriate address of each PHY. A PHY address of

<00000> that is latched in to the part at power-up/reset will

cause the Isolate bit of the PR0 (bit 10, register address 00h)

to be set.

After power up/reset the only way to enable or disable isolate

mode is to set or clear the Isolate bit (bit 10) PR0. After power

up/reset writing <00000> to bits [4:0] of this register will not

cause the part to enter isolate mode.

[00001]

Strap,

R/W

---

reserved

Table 4. Register Descriptions

Bit #

Name

Descriptions

Default Val

RW Type

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