STLC5412P datasheet(23/74 Pages) STMICROELECTRONICS

23 / 74 page

on Br is in the high impedance state.

A 24 ms timer is implemented in the UID. This

timer (when enabled) starts each time the sender

starts a byte sending and waits for a pre acknow-

ledgement.

C/I channel

The C/I channel is used for TXACT and RXACT

registers write and read operation. However, it is

possible to access to ACT registers by monitor

channel: this access is controled by the CID bit in

CR2 register.

The four bits code (C1,C2,C3,C4) of TXACT reg-

ister can be loaded in the UID by writing perma-

nently this code in the C/I channel time-slot on Bx

input every GCI frames. The UID takes into ac-

count the received code when it has been re-

ceived two consecutive times identical. When a

status change occurs in the RXACT register, the

new (C1,C2,C3,C4) code is sent in the C/I chan-

nel time-slot on Br output every GCI frames. This

code is sent permanently by the UID until a new

status change occurs in RXACT register.

C1 bit is sent first to the line.

LINE CODING AND FRAME FORMAT

2B1Q coding rule requires that binary data bits

are grouped in pairs so called quats (see Tab.2).

Each quat is transmitted as a symbol, the magni-

tude of which may be 1 out 4 equally spaced volt-

age levels (see Fig. 6). +3 quat refers to the

nominal pulse waveform specified in the ANSI

standard. Other quats are deduced directly with

respect of the ratio and keeping of the waveform.

The frame format used in UID follows ANSI speci-

fication (see Tab. 3 and 4). Each complete frame

consists of 120 quats, with a line baud rate of 80

kbaud, giving a frame duration of 1.5ms. A nine

quats lenght sync-word defines the framing

boundary. Furthermore, a Multiframe consisting of

8 frames is defined in order to provide sub-chan-

nels within the spare bits M1 to M6. Inversion of

the syncword defines the multiframe boundary. In

LT, the transmit multiframe starting time may be

synchronized by means of a 12 ms period of time

pulse on the SFSx pin selected as an input (bit

SFS in CR2); If SFSx is selected as an output,

SFSx provides a square wave signal with the ris-

ing edge indicating the multiframe starting time.

In NT, the transmit multiframe starting time is pro-

Figure 5: GCI Monitor channel messaging examples.

TWO BYTES MESSAGE - NORMAL TRANSMISSION

(M1)

XM1

1st byte

pre-ack

ack

2nd byte

pre-ack

ack

3rd byte??

pre-ack??

EOM

Ready for

Ready

for a message

(M1)

(M2)

(X)

E & A BITS TIMING

TWO BYTES MESSAGE ABORTED ON THE SECOND AND RETRANSMITTED

1st byte

pre-ack

ack

2nd byte

pre-ack

abort

EOM

1st byte

pre-ack

3rd byte??

Ready for

retransmission

Ready for

a message

(M1)

(M2)

(X)

(or abort ack)

(M1)

XM1

Tx M

Tx E

Rx A

Tx M

Tx E

Rx A

STLC5412

23/74

STLC5412P 数据表(PDF) 23 Page - STMicroelectronics

STLC5412P 数据表(HTML) 23 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

数据表下载

链接网址

STLC5412P 数据表(PDF) 23 Page - STMicroelectronics

STLC5412P 数据表(HTML) 23 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

数据表 下载

链接网址

数据表下载