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STLC5412P 数据表(PDF) 46 Page - STMicroelectronics

部件名 STLC5412P
功能描述  2B1Q U INTERFACE DEVICE ENHANCED WITH DECT MODE
PDF  74 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STLC5412P 数据表(HTML) 46 Page - STMicroelectronics

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MOB = 1: All interrupts issued from
RXM4,
RXM56
RXEOC
and
CR5
are
masked. It is still possible to read
these registers via RXOH.
CTC Corrupted Transmit CRC Control
CTC = 0: Allows the normal calculation of the
CRC for the transmitted data to the line.
CTC = 1: The CRC result transmitted to the line
in the next Superframe is inverted.
This ensure transmission of corrupted
CRC as long as CTC equal 1.
Configuration Register 5 (CR5)
Significant in GCI only.
After reset: FFH
IO4
IO3
IO2
IO1
D4
D3
D2
D1
IO4, IO3, IO2, IO1 Input/Output select for I/O pins
(14, 15, 16, 18)
IOi = 1: IOi pin is selected as an input. An on-
chip pull up resistor ensures a stable
logical 1 at power-on reset or if IOi pin
is not connected to stable source.
IOi = 0: IOi pin is selected as an output.
Each
I/O
pin
can
be
selected
independently from the others.
D4, D3, D2, D1 I/O pin logical level com-
mand/status.
D4, D3, D2, D1 bits are associated with IO4, IO3,
IO2, IO1 pins respectively. When IOi pin is selected
as an output, the associated Di bit can be written to
control the logical level of the output; Di equals 1
commands a high level on IOi. When IOi pin is se-
lected as an input, the associated Di bit indicates
the status of the input; Di equals one indicates a
high level on IOi. CR5 register is buffered in the in-
terrupt stack each time a status change is detected
on an input. It is also possible to read-back at any
time CR5.
Configuration Register 6 (CR6)
After reset: 0FH
T15E
ACTA
UT
PUPAUT
QM
AIS
TFB0
RFS LFS
T15E Timer 15 seconds extension
T15E = 0: The on chip T4 or T6 timer is done for
the ANSI standard: 15 seconds.
T15E = 1: The on chip T4 or T5 timer is
extended to 20 seconds.
Note: the T15D bit in CR3 register enables or dis-
ables the T4/T5 timer independently of theT15E
bit.
ACTAUT: Activation Automatic
ACTAUT = 1: If UID is powered up, a 10KHz
tone from the
line starts the
activation without need of extra
commands (like AR), except when
QM (Quiet mode) is enterred.
ACTAUT = 0 A detection of a 10KHz tone from
the
line
does
not
start
the
activation: UID waits a primitive
command (normaly AR).
PUPAUT PUP Automatic
PUPAUT = 1: A 10KHz tone from the line allows
an automatic power up of the UID.
Notes if ACTAUT is also set to 1, from a power
down state a 10KHz tone automatically starts the
activation.
PUPAUT = 0: A detection of a 10KHz tone from
the line does not power up the
device: UID waits a PUP primitive
command.
QM Quiet mode.
QM = 1: has the same effect of the QM primitive
command enterred in TXACT register.
An or logic is done with the QM bit and
the QM primitive. The goal of this bit is
to allow a quiet mode for an UID in
power down state in some applications.
QM = 0: no effect.
AIS Analog Interface Select.
AIS = 1: selects an analog interface using 27mh
transformer.
AIS = 0: selects an analog interface using 15mh
transformer
TFB0 Transmit febe equal 0
TFB0 = 0: A permanent febe bit = 0 is sent on
the line as long as TFB0 = 0
TFB0 = 1: The febe bit sent on the line is
normaly computed.
RFS Remote febe select.
Please report to the figure 10. RFS is useful in
repetor application to transfert or not the anoma-
lies from the second line section to the first line
section and viceversa.
STLC5412
46/74



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