STMPE1208S datasheet(11/51 Pages) STMICROELECTRONICS

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STMPE1208S

I2C interface

11/51

Data Input

The device samples the data input on SDATA on the rising edge of the SCLK. The SDATA

signal must be stable during the rising edge of SCLK and the SDATA signal must change

only when SCLK is driven low.

Slave device address

The slave device address is a 7 or 10-bit address, where the least significant 3-bit are

programmable. These 3-bit values will be loaded in once upon reset and after that these 3

pins no longer be needed with the exception during General Call. Up to 4 STMPE1208S

devices can be connected on a single I2C bus.

Memory addressing

For the bus master to communicate to the slave device, the bus master must initiate a Start

condition and followed by the slave device address. Accompanying the slave device

address, there is a Read/ bit (R/ ). The bit is set to 1 for read and 0 for write operation.

If a match occurs on the slave device address, the corresponding device gives an

acknowledgement on the SDA during the 9th bit time. If there is no match, it deselects itself

from the bus by not responding to the transaction.

Table 5.

Operation modes

Mode

Byte

Programming sequence

Read

≥1

Start, Device address, R/W = 0, Register address to be read

Restart, Device address, R/W = 1, Data Read, STOP

If no Stop is issued, the Data Read can be continuously performed. If

the register address falls within the range that allows an address auto-

increment, then the register address auto-increments internally after

every byte of data being read. For those register addresses that fall

within a non-incremental address range, the address will be kept static

throughout the entire write operations. Refer to the memory map table

for the address ranges that are auto and non-increment. An example

of such a non-increment address is FIFO

Write

≥1

Start, Device address, R/W = 0, Register address to be written, Data

Write, Stop

If no Stop is issued, the Data Write can be continuously performed. If

the register address falls within the range that allows address auto-

increment, then the register address auto-increments internally after

every byte of data being written in. For those register addresses that

fall within a non-incremental address range, the address will be kept

static throughout the entire write operations. Refer to the memory map

table for the address ranges that are auto and non-increment.

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