LIS331DL datasheet(28/42 Pages) STMICROELECTRONICS

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LIS331DL

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7.4

CTRL_REG3 [interrupt CTRL register] (22h)

7.5

HP_FILTER_RESET (23h)

Dummy register. Reading at this address zeroes instantaneously the content of the internal

high pass-filter. If the high pass filter is enabled all three axes are instantaneously set to 0 g.

This allows to overcome the settling time of the high pass filter.

Table 21.

High pass filter cut-off frequency configuration

HPcoeff2,1

ft (Hz)

(ODR=100 Hz)

ft (Hz)

(ODR=400 Hz)

0.5

0.25

Table 22.

CTRL_REG3 register

IHL

PP_OD

I2_CFG2

I2_CFG1

I2_CFG0

I1_CFG2

I1_CFG1

I1_CFG0

Table 23.

CTRL_REG3 description

IHL

Interrupt active high, low. Default value 0.

(0: active high; 1: active low)

PP_OD

Push-pull/Open Drain selection on interrupt pad. Default value 0.

(0: push-pull; 1: open drain)

I2_CFG2

I2_CFG1

I2_CFG0

Data signal on INT2 pad control bits. Default value 000.

(see table below)

I1_CFG2

I1_CFG1

I1_CFG0

Data signal on INT1 pad control bits. Default value 000.

(see table below)

Table 24.

Data Signal on INT1(2) pad control bits

I1(2)_CFG2

I1(2)_CFG1

I1(2)_CFG0

INT 1(2) Pad

GND

001

FF_WU_1

010

FF_WU_2

FF_WU_1 OR FF_WU_2

100

Data ready

Click interrupt

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