Functional description

TDA7502

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6.2

DSP peripherals

There are a number of peripherals that are tightly coupled to the DSP Core. Each of the

peripherals are listed below and described in the following sections.

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1024 x 24-Bit X-RAM.

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1024 x 24-Bit Y-RAM.

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3072 x 24-Bit program RAM.

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512 x 24-Bit Boot ROM.

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Serial audio interface (SAI).

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GPIO.

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PLL clock oscillator.

6.3

Data and program memory

Each of the memories are described below.

6.3.1

1024 x 24-Bit X-RAM (XRAM)

This is a 1024 x 24-Bit single port SRAM used for storing coefficients. The 16-Bit XRAM

address, XABx(15:0) is generated by the address generation unit of the DSP core. The 24-

Bit XRAM Data, XDBx(23:0), may be written to and read from the data ALU of the DSP core.

The XDBx Bus is also connected to the internal bus switch so that it can be routed to and

from all peripheral blocks.

6.3.2

1024 x 24 Bit Y-RAM (YRAM)

This is a 1024 x 24-Bit single port SRAM used for storing coefficients. The 16-Bit address,

YABx(15:0) is generated by the address generation unit of the DSP core. The 24-Bit Data,

YDBx(23:0), is written to and read from the Data ALU of the DSP core. The YDBx Bus is

also connected to the internal bus switch so that it can be routed to and from other blocks.

6.3.3

3072 X 24-Bit Program RAM

This is a 3072 x 24-Bit single port SRAM used for storing and executing program code. The

16-Bit PRAM Address, PABx(15:0) is generated by the program address generator of the

DSP core for instruction fetching, and by the AGU in the case of the move program memory

(MOVEM) instruction. The 24-Bit PRAM Data (program code), PDBx(23:0), can only be

written to using the MOVEM instruction.

During instruction fetching the PDBx bus is routed to the program decode controller of the

DSP core for instruction decoding.

Spare space in the program area may be used as data memory to implement delay lines for

example.

6.3.4

512 x 24-Bit Bootstrap ROM (Boot ROM)

This is a 512 x 24-Bit factory programmed Boot ROM used for storing the program

sequence for initializing the DSP.