TS2012FC

Package information

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Package information

packages. These packages have a lead-free second level interconnect. The category of

second level interconnect is marked on the package and on the inner box label, in

compliance with JEDEC Standard JESD97. The maximum ratings related to soldering

conditions are also marked on the inner box label. ECOPACK is an ST trademark.

Figure 41.

Flip-chip package mechanical drawing

Die size: 2.1x2.1 mm ± 30µm

Die height (including bumps):

600µm

Bump diameter: 315µm ±50µm

Bump diameter before reflow:

300µm ±10µm

Bump height: 250µm ±40µm

Die height: 350µm ±20µm

Pitch: 500µm ±50µm

Bump Coplanarity: 60µm max

Optional*: Back coating height:

40µm

500

μm

2.1 mm

2.1 mm

600

μm

40

μm*

G1

INL+

250

μm

500

μm

2.1 mm

2.1 mm

600

μm

40

μm*

G1

INL+

250

μm