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PM6675AS 数据表(PDF) 22 Page - STMicroelectronics |
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PM6675AS 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 48 page  Device description PM6675AS 22/48 Figure 26. "Virtual-ESR" network The ripple on the COMP pin is the sum of the output voltage ripple and the triangular ripple generated by the Virtual-ESR Network. In fact the Virtual-ESR Network behaves like a further equivalent series resistor RVESR. A good trade-off is to design the network in order to achieve an RVESR given by: Equation 10 where ∆IL is the inductor current ripple and VRIPPLE is the total ripple at the T node, chosen greater than approximately 20 mV. The new closed-loop gain depends on CINT. In order to ensure stability it must be verified that: Equation 11 where: Equation 12 C CO OM MP P V VS SN NS S C CIINNTT R RIINNTT C CFFIILLTT t VREF C COOUUTT COMP PIN VOLTAGE OUTPUT VOLTAGE C C R R R R11 t t T T NODE VOLTAGE ΔV ΔV2 E ES SR R ΔV1 + - V VR RE EF F g gm m R RFFbb11 R RFFbb22 V Vrr + P PW WM M C Co om mp pa arra atto orr I=gm(V1-Vr) V V11 ESR I V R L RIPPLE VESR − ∆ = Vout Vr f 2 g C Z m INT ⋅ ⋅ π > TOT out Z R C 2 1 f ⋅ ⋅ π = |
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