PM6675AS datasheet(32/48 Pages) STMICROELECTRONICS

32 / 48 page

Device description

PM6675AS

32/48

Figure 34.

LDO output voltage selection

A compensation capacitor Cc must be added to adjust the dynamic response of the loop.

The value of Cc is calculated according to the desired bandwidth of the LDO regulator and

depends on the value of the feedback resistors. In most of applications the pole due to the

compensation capacitor is placed at 100-200 kHz (equation 24).

Equation 24

The LIN input can be connected to the switching section output for compact solutions or to a

lower supply, if available in the system, in order to reduce the power dissipation of the LDO.

A minimum output capacitance of 20

µF (2x10 µF MLCC capacitors) is enough to assure

stability and fast load transient response.

7.2.1

LDO section current limit

The LDO regulator can handle up to ±2 Apk, depending on the LDO input voltage and the

LILIM pin setting. The output current is limited to ±1 A or ±2 A if the LILIM pin is connected

to SGND or AVCC respectively (Figure 35).

Figure 35.

LDO current limit setting

The maximum current that the LDO can source depends also on the input and output

voltages. Due to the high side MOSFET of the output stage, the LDO cannot source the limit

current at high output voltages. Figure 36 shows the maximum current that the LDO can

source as function of the input and output voltages. For output voltages higher than 2 V, the

maximum output current is limited as reported.

PM6675AS

LFB

LOUT

R19

R20

VLOUT

LGND

COUT

kHz

200

)

(

⋅

⊕

PM6675AS

LILIM

+5V

±2A CL

±1A CL

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