ADE3800SXL datasheet(96/138 Pages) STMICROELECTRONICS

部件名	ADE3800SXL

功能描述	Analog LCD Display Engine for XGA and SXGA Resolutions with Embedded LVDS and RSDS Transmitters

PDF	138 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

96 / 138 page

ADE3800

96/138

The omux architecture consists of 2 main blocks as shown in Figure 19.

OMUX_CTRL7

0C37

R/W

[7]

1: invert RSDS clock 1 (RSDS data pair

12)

R/W

[6]

0*: normal LVDS PLL clock if LVDS

mode (normal)

1: invert LVDS PLL clock if LVDS mode,

or invert RSDS clock 0 (RSDS data pair

21) if RSDS mode

R/W

[4]

1: invert LVDS output DE

R/W

[1]

[0]

TCON remapped to PWM

TCON[1] = pwm_a enable

TCON[0] = pwm_b enable

OMUX_HALF_LINE_L

OMUX_HALF_LINE_U

0C38

0C39

R/W

[7:0]

[3:0]

RSDS split buffer half line address =

out_hpixel/2.

out_hpixel has to be multiples of 4.

E.g. for SXGA panel (1280) the value is

640

OMUX_TEST

0C3A

R/W

[1]

1: enable RSDS debug mode

R/W

[0]

1: enable LVDS debug mode

Table 34: OMUX_CTRL Output Modes

OUTPUT MODE

OMUX_CTRL1 [0]

OMUX_CTRL3 [0]

idle

LVDS mode

RVDS mode

Figure 19: OMUX Architecture

Table 33: OMUX Registers (Sheet 3 of 3)

Addr

Mode

Bits

Rst

Description

ADE3800SXL 数据表(PDF) 96 Page - STMicroelectronics

ADE3800SXL 数据表(HTML) 96 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载