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ADE3800SXL 数据表(PDF) 128 Page - STMicroelectronics |
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ADE3800SXL 数据表(HTML) 128 Page - STMicroelectronics |
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128 / 138 page  Electrical Specifications ADE3800 128/138 5.7 ADC Characteristics VRSDS-CM RSDS Common Mode Output Voltage 680 ohm + 50 ohm external termination to 1.3V 1.1 1.3 1.5 V Trise, Tfall RSDS Transition Time to 90% CL = 30pF 3ns Symbol Parameter Condition Min. Typ. Max. Unit INL ADC Integral Nonlinearity (7-bit) Without Dithering 0.6 1.0 1.5 LSB DNL ADC Differential Nonlinearity (7- bit) Without Dithering No missing codes 0.3 0.6 1.0 LSB Σ NOB Effective Number of Bits VINADC = 1MHz sinusoidal, 0.5VPP - 1VPP, FSAMPLING = 20 MHz 6.2 6.6 6.8 Bit THD Total Harmonic Distortion VINADC = 1MHz sinusoidal, 0.5VPP - 1VPP FSAMPLING = 20 MHz -48 -44 -41 dB VINADC ADC Input Voltage Range 0.5 1 Vp-p RINADC ADC Input Resistance 200 Kohms CINADC ADC Input Capacitance 12 pF FADC ADC Sample Frequency 20 140 MHz ADC gain step ADC Gain Step Size 0.05 dB ADC offset step ADC Offset Step Size 2.9 mV Symbol Parameter Condition Min. Typ. Max. Unit |
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