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STPC12GDYI 数据表(PDF) 31 Page - STMicroelectronics |
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STPC12GDYI 数据表(HTML) 31 Page - STMicroelectronics |
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31 / 111 page  PIN DESCRIPTION Issue 1.0 - July 24, 2002 31/111 AE14 TFTB5 AB14 TFTLINE AC14 TFTFRAME AF15 TFTDE AE15 TFTENVDD AD15 TFTENVCC AC15 TFTPWM AD14 TFTDCLK D21 OC A20 USBDMNS[0] A18 USBDMNS[1] A21 USBDPLS[0] A19 USBDPLS[1] E20 POWERON AC22 CTS0# AC24 CTS1# AD21 DCD0# AE24 DCD1# AC21 DSR0# AD25 DSR1# AD22 DTR0# AC26 DTR1# AD23 RI0# AA22 RI1# AE22 RTS0# AC25 RTS1# AB21 RXD0 AD26 RXD1 AE23 TXD0 AB23 TXD1 AD20 KBCLK AB19 KBDATA AC20 MDATA AB20 MCLK AA23 PE W24 SLCT W23 BUSY W25 ERR# W26 ACK# V22 PDDIR V24 STROBE# V25 INIT# V26 AUTOFD# U22 SLCTIN# Y22 PPD[0] AA24 PPD[1] AA25 PPD[2] Table 2-6. Pinout Pin# Pin Name Note1; This signal is multiplexed see Table 2-4 AA26 PPD[3] Y24 PPD[4] Y25 PPD[5] Y26 PPD[6] W22 PPD[7] AC19 SCL / DDC[1] AD19 SDA / DDC[0] C2 GPIO[0] C1 GPIO[1] D3 GPIO[2] D2 GPIO[3] D1 GPIO[4] E4 GPIO[5] E3 GPIO[6] E2 GPIO[7] E1 GPIO[8] F5 GPIO[9] F4 GPIO[10] F3 GPIO[11] F2 GPIO[12] G5 GPIO[13] G4 GPIO[14] G2 GPIO[15] H2 TCLK J5 TRST H5 TDI H3 TMS H1 TDO G1 SCAN_ENABLE AD10 COL_SEL C25 SPKRD AD16 VDD_DCLK_PLL Y23 VDD_DEVCLK_PLL AE20 VDD_HCLKI_PLL AB26 VDD_HCLKO_PLL AE19 VDD_MCLKI_PLL AE18 VDD_MCLKO_PLL AE21 VDD_PCICLK_PLL F13 VDD_CORE F15 VDD_CORE F17 VDD_CORE K6 VDD_CORE M21 VDD_CORE N6 VDD_CORE P21 VDD_CORE Table 2-6. Pinout Pin# Pin Name Note1; This signal is multiplexed see Table 2-4 R6 VDD_CORE U21 VDD_CORE AA10 VDD_CORE AA12 VDD_CORE AA14 VDD_CORE A2 VDD A25 VDD B1 VDD B26 VDD F7 VDD F11 VDD F20 VDD G6 VDD G21 VDD H6 VDD J21 VDD K21 VDD U6 VDD V6 VDD Y6 VDD Y21 VDD AA7 VDD AA16 VDD AA18 VDD AA20 VDD AE01 VDD AE26 VDD AF02 VDD AF25 VDD A1 GND A26 GND B2 GND B25 GND C3 GND C24 GND D4 GND D10 GND D16 GND D23 GND E5 GND E22 GND F6 GND F8 GND F9 GND F10 GND F12 GND F14 GND F16 GND F18 GND Table 2-6. Pinout Pin# Pin Name Note1; This signal is multiplexed see Table 2-4 |
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