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数据搜索系统，热门电子元器件搜索 |
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STPCE1HDBC 数据表(PDF) 35 Page - STMicroelectronics |
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STPCE1HDBC 数据表(HTML) 35 Page - STMicroelectronics |
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35 / 87 page  ELECTRICAL SPECIFICATIONS Release 1.3 - January 29, 2002 35/87 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. Note 1: PCI clock at 33MHz Table 4-4. 2.5V Power Consumptions (VCORE + VDD_x_PLL) HCLK (MHz) CPUCLK (MHz) MCLK (MHz) Mode PMU (State) PMax (W) V2.5V=2.45V V2.5V=2.7V 66 66 (x1) 66 SYNC Stop Clock 0.7 0.9 Full Speed 0.9 1.2 100 100 (x1) 100 Stop Clock 1.1 1.4 Full Speed 1.4 1.9 66 133 (x2) 66 Stop Clock 0.8 1.1 Full Speed 1.3 1.7 66 133 (x2) 100 ASYNC Stop Clock 1.0 1.4 Full Speed 1.5 2.0 Table 4-5. 3.3V Power Consumptions (VDD) HCLK (MHz) CPUCLK (MHz) MCLK (MHz) PMU (State) PMax (mW) 66 66 (x1) 66 Full Speed 70 100 100 (x1) 100 90 66 133 (x2) 66 80 66 133 (x2) 100 100 Table 4-6. PLL Power Consumptions PLL name PMax (mW) VDD_PLL = 2.45V VDD_PLL = 2.7V VDD_GPCLK_PLL 5 10 VDD_HCLKI_PLL 5 10 VDD_HCLKO_PLL 5 10 VDD_MCLKI_PLL 5 10 VDD_MCLKO_PLL 5 10 VDD_PCICLK_PLL 5 10 |
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