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STPC0366BTC3 数据表(PDF) 12 Page - STMicroelectronics

部件名 STPC0366BTC3
功能描述  PC Compatible Embeded Microprocessor
PDF  51 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STPC0366BTC3 数据表(HTML) 12 Page - STMicroelectronics

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PIN DESCRIPTION
12/51
Issue 1.2
ISA/IDE COMBINED CONTROL
IOCHRDY / DIORDY
I/O
I/O Channel Ready (ISA) - Busy/Ready (IDE)
1
ISA CONTROL
OSC14M
O
ISA bus synchronisation clock
1
ALE
O
Address Latch Enable
1
BHE#
I/O
System Bus High Enable
1
MEMR#, MEMW#
I/O
Memory Read and Memory Write
2
SMEMR#, SMEMW#
O
System Memory Read and Memory Write
2
IOR#, IOW#
I/O
I/O Read and Write
2
MASTER#
I
Add On Card Owns Bus
1
MCS16#, IOCS16#
I
Memory/IO Chip Select16
2
REF#
O
Refresh Cycle.
1
AEN
O
Address Enable
1
ZWS#
I
Zero Wait State
1
IOCHCK#
I
I/O Channel Check.
1
ISAOE#
O
Bidirectional OE Control
1
RTCAS#
O
Real Time Clock Address Strobe
1
GPIOCS#
I/O
General Purpose Chip Select
1
IDE CONTROL
PIRQ
I
Primary Interrupt Request
1
SIRQ
I
Secondary Interrupt Request
1
PDRQ
I
Primary DMA Request
1
SDRQ
I
Secondary DMA Request
1
PDACK#
O
Primary DMA Acknowledge
1
SDACK#
O
Secondary DMA Acknowledge
1
PIOR#
I/O
Primary I/O Read
1
PIOW#
O
Primary I/O Write
1
SIOR#
I/O
Secondary I/O Read
1
SIOW#
O
Secondary I/O Write
1
IPC
IRQ_MUX[3:0]
I
Multiplexed Interrupt Request
4
DREQ_MUX[1:0]
I
Multiplexed DMA Request
2
DACK_ENC[2:0]
O
DMA Acknowledge
3
TC
O
ISA Terminal Count
1
MONITOR INTERFACE
RED, GREEN, BLUE
O
Red, Green, Blue
3
VSYNC
O
Vertical Sync
1
HSYNC
O
Horizontal Sync
1
VREF_DAC
I
DAC Voltage reference
1
RSET
I
Resistor Set
1
COMP
I
Compensation
1
DDC[1:0]
I/O
Display Data Channel Serial Link
2
SCL / DDC[1]
I/O
I C Interface - Clock / Can be used for VGA DDC[1] signal
1
Table 2-2. Definition of Signal Pins
Signal Name
Dir
Description
Qty



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