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STPC12 数据表(PDF) 46 Page - STMicroelectronics |
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STPC12 数据表(HTML) 46 Page - STMicroelectronics |
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46 / 111 page ![]() ELECTRICAL SPECIFICATIONS 46/111 Issue 1.0 - July 24, 2002 4.5. AC CHARACTERISTICS This section lists the AC characteristics of the STPC interfaces including output delays, input setup requirements, input hold requirements and output float delays. These measurements are based on the measurement points identified in Figure 4-1 and Figure 4-2. The rising clock edge reference level VREF and other reference levels are shown in Table 4-9 below. Input or output signals must cross these levels during testing. Figure 4-1 shows output delay (A and B) and input setup and hold times (C and D). Input setup and hold times (C and D) are specified minimums, defining the smallest acceptable sampling window a synchronous input signal must be stable for correct operation. Note: Refer to Figure 4-1. Table 4-9. Drive Level and Measurement Points for Switching Characteristics Symbol Value Units VREF 1.5 V VIHD 2.5 V VILD 0.0 V Figure 4-1. Drive Level and Measurement Points for Switching Characteristics CLK: VRef VILD VIHD Tx LEGEND: A - Maximum Output Delay Specification B - Minimum Output Delay Specification C - Minimum Input Setup Specification D - Minimum Input Hold Specification VRef Valid Valid Valid OUTPUTS: INPUTS: Output n Output n+1 Input MAX MIN A B CD VRef VILD VIHD |
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