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LED7707TR 数据表(PDF) 16 Page - STMicroelectronics |
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LED7707TR 数据表(HTML) 16 Page - STMicroelectronics |
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16 / 48 page ![]() Operation description LED7707 16/48 5.1.5 Switching frequency selection and synchronization The switching frequency of the boost converter can be set in the 250 kHz-1 MHz range by connecting the FSW pin to ground through a resistor. Calculation of the setting resistor is made using equation 4 and should not exceed the 100 k Ω-400 kΩ range. Equation 4 In addition, when the FSW pin is tied to AVCC, the LED7707 uses a default 660 kHz fixed switching frequency, allowing to save a resistor in minimum component-count applications. Figure 10. Multiple device synchronization The FSW pin can also be used as synchronization input, allowing the LED7707 to operate both as master or slave device. If a clock signal with a 210 kHz minimum frequency is applied to this pin, the device locks synchronized. The signal provided to the FSW pin must cross the 270 mV threshold in order to be recognized. The minimum pulse width which allows the synchronizing pulses to be detected is 270 ns. An Internal time-out allows synchronization as long as the external clock frequency is greater than 220 kHz. Keeping the FSW pin voltage lower than 270 mV for more than 4.5 µs results in device turned off. Normal operation is resumed as soon as FSW rises above the mentioned threshold and the soft-start sequence is repeated. The SYNC pin is a synchronization output and provides a 35 % (typ.) duty-cycle clock when the LED7707 is used as master or a replica of the FSW pin when used as slave. It is used to connect multiple devices in a daisy-chain configuration or to synchronize other switching converters running in the system with the LED7707 (master operation). When an external synchronization clock is applied to the FSW pin, the internal oscillator is over-driven: each switching cycle begins at the rising edge of clock, while the slope compensation (Figure 11) ramp starts at the falling edge of the same signal. Thus, to prevent sub-harmonic instability (see Section 5.1.6), the external synchronization clock is required to have a 40 % maximum duty-cycle when the boost converter is working in continuous-conduction mode (CCM) in order to assure that the slope compensation is effective (starts with duty-cycle lower than 40%) 5 . 2 F R SW FSW = SYNC SGND LED7707 AVCC RFSW FSW SYNC SGND LED7707 SLAVE FSW MASTER Sync Out SYNC AM00587v1 |
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