数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

HD151TS207SS 数据表(PDF) 7 Page - Renesas Technology Corp

部件名 HD151TS207SS
功能描述  Mother Board Clock Generator for Intel P4 Chipset (Springdale)
PDF  38 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

HD151TS207SS 数据表(HTML) 7 Page - Renesas Technology Corp

Back Button HD151TS207SS Datasheet HTML 3Page - Renesas Technology Corp HD151TS207SS Datasheet HTML 4Page - Renesas Technology Corp HD151TS207SS Datasheet HTML 5Page - Renesas Technology Corp HD151TS207SS Datasheet HTML 6Page - Renesas Technology Corp HD151TS207SS Datasheet HTML 7Page - Renesas Technology Corp HD151TS207SS Datasheet HTML 8Page - Renesas Technology Corp HD151TS207SS Datasheet HTML 9Page - Renesas Technology Corp HD151TS207SS Datasheet HTML 10Page - Renesas Technology Corp HD151TS207SS Datasheet HTML 11Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 38 page
background image
HD151TS207SS
Rev.1.00, Apr.25.2003, page 7 of 38
I
2C Controlled Register Bit Map
Byte0 Control Register
Bit
Description
Contents
Type
Default
Note
7
Reserved
R
0
6
Reserved
R
0
5
Reserved
R
0
4
Reserved
R
0
3
PCI_Stop Reflects the current value
of the external PCI_STOP# pin
0 = PCI_STOP# pin is Low
1 = PCI_STOP# pin is High
RX
2
Reserved
R
X
1
FS_B Reflects the value of the
FS_B pin sampled on power up
0 = FS_B Low at power up
1 = FS_B High at power up
RX
0
FS_A Reflects the value of the
FS_A pin sampled on power up
0 = FS_A Low at power up
1 = FS_A High at power up
RX
See
Table
1
Table1 Clock Frequency Function Table
Byte6
Bit5
FS_A
FS_B
CPU
[MHz]
SRC
[MHz]
3V66
[MHz]
PCIF
PCI
[MHz]
REF0
REF1
[MHz]
USB
DOT
[MHz]
Note
0
0
0
100
100/200
66
33
14.318
48
0
0
1
200
100/200
66
33
14.318
48
0
1
0
133
100/200
66
33
14.318
48
0
1
1
166
100/200
66
33
14.318
48
1
0
0
200
100/200
66
33
14.318
48
1
0
1
400
100/200
66
33
14.318
48
1
1
0
266
100/200
66
33
14.318
48
1
1
1
333
100/200
66
33
14.318
48
Table2 Test Clock select table
TEST_CLK#
CPU
[MHz]
SRC
[MHz]
3V66
[MHz]
PCIF
PCI
[MHz]
REF0
REF1
[MHz]
USB
DOT
[MHz]
Note
1
REF/2
REF/2
REF/4
REF/8
REF
REF/2
0
Hi–Z
Hi–Z
Hi–Z
Hi–Z
Hi–Z
Hi–Z
See Note1,
Table3
Note:
1. REF is a clock over driven on the XIN during test mode.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com