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STV0056AF 数据表(PDF) 5 Page - STMicroelectronics

部件名 STV0056AF
功能描述  SATELLITE SOUND AND VIDEO PROCESSOR
PDF  27 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STV0056AF 数据表(HTML) 5 Page - STMicroelectronics

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PIN DESCRIPTION (continued)
2 - Baseband Audio Processing
PK OUT L, PK OUT R, PK OUT
The noise reduction control loop peak detector
output requires a capacitor to ground from this pin,
and a resistor to VREF pin to give some accurate
decaytime constant.An on chip5k
Ω ±25 % resistor
and external capacitor give the attack time.
PK IN L, PK IN R or PK IN
Each of thesepins is an input to a control loop peak
detector and is connected to the output of the
offchip control loop band pass filter.
LEVEL L, LEVEL R
Respectively the audio left and right signals of the
FM demodulators are output to level L and level R
pins through an input follower buffer. The off-chip
filters driven by these pins must include AC cou-
pling to the next stage (PK IN L and PK IN R pins
respectively).
FC L, FC R
The variable bandwidth transconductance ampli-
fier has a current output which is variable depend-
ing on the input signal amplitude as defined by the
control loop of the noise reduction. The output
current is then dumped into an off-chip capacitor
which together with the accurate current reference
define the min/max rolloff frequencies.A resistor in
series with a capacitor is connectedto ground from
these two pins.
J17 L, J17 R
The external J17 de-emphasis networks for chan-
nels left and right. The amplifier for this filter is
voltage input, current output. Output with
±500mV
input will be
±55µA.
To perform J17 de-emphasis with the STV0042,an
external circuit is required.
U75 L, U75 R
External deemphasis networks for channels left
and right. For each channela capacitorand resistor
in parallel of 75
µs time constant are connected
between here and VREF to provide 75
µs de-empha-
sis. Internally selectable is an internal resistor that
can be programmed to be added in parallel thereby
converting the network to approx 50
µs de-empha-
sis (see control block map). The value of the inter-
nal resistors is 54k
Ω ±30 %. The amplifier for this
filter is voltage input, current output ; with
±500mV
input the output will be
±55µA.
VOL L, VOL R
The main audio output from the volume control
amplifier the signal to get output signals as high as
2VRMS (+12dB) on a DC bias of 4.8V. Control is
from +12dB to -26.75dB plus Mute with 1.25dB
steps. This amplifier has short circuit protection and
is intendedto drive a SCART connectordirectly via
AC coupling and meets the standard SCART drive
requirements. These outputs feature high imped-
ance mode for parallel connection.
S2 OUT L, S2 OUT R, S3 OUT L, S3 OUT R
These audio outputs are sourced directly from the
audio MUX, and as a result do not include any
volume control function. They will output a 1VRMS
signal biased at 4.8V. They are short circuit pro-
tected. These outputs feature high impedance
mode for parallel connection and meet SCART
drive requirement.
S2 RTN L, S2 RTN R, S3 RTN L, S3 RTN R
These pins allow auxiliary audio signals to be con-
nected to the audio processor and hence makes
use of the on-chip volume control. For additional
details please refer to the audio switching table.
STV0056AF
5/27



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