STV0056AF datasheet(6/27 Pages) STMICROELECTRONICS

6 / 27 page

PIN DESCRIPTION (continued)

3 - Video Processing

B-BAND IN

AC-coupled video input from a tuner.

ZIN > 10k

Ω ±25%. This drives an on-chip video

amplifier. The other input of this amp is AC

grounded by being connected to an internal VREF.

The video amplifier has selectable gain from 0dB

to 12.7dB in 63 steps and its output signal can be

selected normal or inverted.

UNCL DEEM

Deemphasized still unclamped output. It is also an

input of the video matrix.

VIDEEM1

Connected to an external de-emphasis network

(for instance 625 lines PAL de-emphasis).

VIDEEM2 / 22kHz

Connected to an external de-emphasis network

(for instance 525 lines NTSC or other video de-em-

phasis). Alternatively a precise 22kHz tone may be

output by I

2C bus control.

CLAMP IN

This pin clamps the most negative extreme of the

input (the sync tips) to 2.7VDC (or appropriate volt-

age). The video at the clamp input is only 1VPP.

This clamped video which is de-emphasised, fil-

tered and clamped (energy dispersal removed) is

normal, negative syncs, video. This signal drives

the Video Matrix input called Normal Video.

It has a weak (1.0

µA ±15 %) stable current source

pulling the input towards GND. Otherwise the input

impedance is very high at DC to 1kHz ZIN >2M

Ω.

Video bandwidth through this is -1dB at 5.5MHz.

The CLAMP input DC restore voltage is then used

as a means for getting the correct DC voltage on

the SCART outputs.

S3 VID RTN

This input can be driven for instance by the de-

coder. This input has a DC restoration clamp on its

input. The clamp sink current is 1

µA ±15% with the

buffer ZIN >1M

Ω.

S2 VID RTN, S1 VID RTN

External video input 1.0Vpp AC coupled75

Ω source

impedance. This input has a DC restoration clamp

on its input. The clamp sink current is 1

µA ±15%

with the buffer ZIN >1M

Ω. This signal is an input to

the Video Matrix.

S1 VID OUT, S2 VID OUT

Video drivers for SCART 1 and SCART 2. An

external emitter follower buffer is required to drive

a 150

Ω load. The average DC voltage to be 1.5V

on the O/P. The signal is video 2.0VPP 5.5MHz BW

with sync tip = 1.2V. These pins get signals from

the Video Matrix. The signal selected from the

Video Matrix for output on this pin is controlled by

a control register. This output also feature a high

impedance mode for parallel connection.

S3 VID OUT

This output can drive for instance a decoder. Also

it is able to pass 10MHz ; ZOUT <75

Ω. Video on

this pin will be 2VPP. The black level of the ouput

video signal can be adjusted through I

2C bus con-

trol to easily interface with on-board Videocrypt

decoder. This output feature an high impedance

mode for parallel connection.

V 12V

+ 12V double bonded : ESD+guard rings and video

circuit power.

V GND

Doubled bonded. Clean VID IN GND. Strategically

placed video power ground connection to reduce

video currents getting into the rest of the circuit.

4 - Control Block

GND 5V

The main power ground connection for the control

logic, registers, the I

2C bus interface, synthesizer

& watchdog and XTLOSC.

VDD 5V

Digital +5V power supply.

SCL

This is the I

2C busclock line. Clock= DC to 100kHz.

Requires external pull up eg. 10k

Ω to 5V.

SDA

This is the I

2C bus data line. Requires external pull

up eg. 10k

Ω to 5V.

I/O / 22kHz

General purpose input output pin or 22kHz output.

XTL

This pin allows for the on-chip oscillator to be either

used with a crystal to ground of 4MHz or 8MHz, or

to be driven by an external clock source. The

external source can be either 4MHz or 8MHz. A

programmablebit in the control block removes a

÷2

block when the 4MHz option is selected.

Hardware address with internal 135

µA pull down.

Chip address is 06 when this pin is grouded and

chip address is 46 when connected to VDD.

STV0056AF

6/27

STV0056AF 数据表(PDF) 6 Page - STMicroelectronics

STV0056AF 数据表(HTML) 6 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

数据表下载