M66596FP datasheet(21/131 Pages) RENESAS

21 / 131 page

M66596FP/WG

rev .1.00

2006.3.14

page 21 of 127

2.4 USB signal control

Device state control register [DVSTCTR]

<Address: 04H>

WKUP RWUPE USBRST RESUME UACT

RHST

Bit

Name

Function

S/W

H/W

Note

15-9

Nothing is placed here. These should be fixed at “0”.

WKUP

Wakeup output (Peripheral mode)

0: Non-output

1: Remote wakeup signal output

R/W(1) R/W(0)

2.4.1

*1),*2)

RWUPE

Remote wakeup enable

(Host mode)

0: Remote wakeup disabled

1: Remote wakeup enabled

R/W

2.4.1

*2)

,*3)

USBRST

USB bus reset output (Host mode)

0: Non-output

1: USB bus reset output

R/W

2.4.1

*3)*3

RESUME

Resume output (Host mode)

0: Non-output

1: Resume signal output

R/W

R/W(1)

2.4.1

*3)

UACT

USB Communication enable

0: Disable

1: Enable

R/W

2.4.1

*3)

3-2 Nothing is placed here. These should be fixed at “0”.

1-0 RHST

Reset handshake

00: Communication speed not decided

01: Reset handshake being processed

10: Full-Speed operation established

11: Hi-Speed operation established

2.4.2

<<Notes>>

*1) ”1” should never be written to the WKUP bit unless “Suspended” is set for the device state (“DVSQ = 1xx”) and

a remote wakeup from the USB host is enabled.

*2) If the WKUP or RWUPE bit is set 1,don’ t stop Internal clock supply.

*3) If the controller is in peripheral mode ,set to “RWUPE=0, USBRST=0, RESUME=0, UACT=0”.

Test mode register [TESTMODE]

<Address: 06H>

UTST

Bit

Name

Function

S/W

H/W

Note

15-4 Nothing is placed here. These should be fixed at “0”.

3-0 UTST

Test mode

Please see the detailed explanation concerning

this item.

R/W

2.4.3

*4)

<<Note>>

*4)

The UTST bit is valid only during Hi-Speed operation. Check to make sure the “RHST=11” before using it.

H/W reset is required for after the test by UTST bit operation.

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