R8C2K datasheet(94/471 Pages) RENESAS

94 / 471 page

R8C/2K Group, R8C/2L Group

10. Clock Generation Circuit

Rev.1.10

Dec 21, 2007

Page 77 of 450

REJ09B0406-0110

Figure 10.6

Registers FRA0 and FRA1

High-Speed On-Chip Oscillator Control Register 0

(1)

Symbol

Address

After Reset

FRA0

0023h

00h

Bit Symbol

Bit Name

Function

NOTES:

Change the FRA01 bit under the follow ing conditions.

• FRA00 = 1 (high-speed on-chip oscillation)

• The CM14 bit in the CM1 register = 0 (low -speed on-chip oscillator on)

• Bits FRA22 to FRA20 in the FRA2 register:

All divide ratio mode settings are supported w hen VCC = 3.0 V to 5.5 V 000b to 111b

Divide ratio of 4 or more w hen VCC = 2.7 V to 5.5 V

010b to 111b (divide by 4 or more)

Divide ratio of 8 or more w hen VCC = 2.2 V to 5.5 V

110b to 111b (divide by 8 or more)

When setting the FRA01 bit to 0 (low -speed on-chip oscillator selected), do not set the FRA00 bit to 0 (high-speed

on-chip oscillator off) at the same time. Set the FRA00 bit to 0 after setting the FRA01 bit to 0.

—

(b7-b2)

Reserved bits

Set to 0.

Set the PRC0 bit in the PRCR register to 1 (w rite enable) before rew riting the FRA0 register.

FRA00

FRA01

High-speed on-chip oscillator

enable bit

0 : High-speed on-chip oscillator off

1 : High-speed on-chip oscillator on

High-speed on-chip oscillator

select bit(2)

0 : Selects low -speed on-chip oscillator(3)

1 : Selects high-speed on-chip oscillator

0000

b3 b2 b1 b0

b7 b6 b5 b4

High-Speed On-Chip Oscillator Control Register 1

(1)

Symbol

Address

After Reset

FRA1

0024h

When Shipping

NOTES:

Set the PRC0 bit in the PRCR register to 1 (w rite enable) before rew riting the FRA1 register.

Function

The frequency of the high-speed on-chip oscillator is adjusted w ith bits 0 to 7.

High-speed on-chip oscillator frequency = 40 MHz (FRA1 register = value w hen shipping)

Setting the FRA1 register to a low er value results in a higher frequency.

Setting the FRA1 register to a higher value results in a low er frequency.(2)

When changing the values of the FRA1 register, adjust the FRA1 register so that the frequency of the high-speed

on-chip oscillator clock w ill be 40 MHz or less.

b7 b6 b5 b4 b3 b2 b1 b0

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