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HD6417618A 数据表(PDF) 379 Page - Renesas Technology Corp |
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HD6417618A 数据表(HTML) 379 Page - Renesas Technology Corp |
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379 / 646 page ![]() Section 14 Serial Communication Interface with FIFO (SCIF) Rev. 6.00 Jun. 12, 2007 Page 347 of 610 REJ09B0131-0600 Table 14.2 SCSMR Settings SCSMR Settings n Clock Source CKS1 CKS0 0 P φ 0 0 1 P φ/4 0 1 2 P φ/16 1 0 3 P φ/64 1 1 Note: The bit rate error in asynchronous is given by the following formula: Error (%) = - 1 × 100 (N + 1) × B × 642n-1 × 2 P φ × 106 Table 14.3 lists examples of SCBRR settings in asynchronous mode, and table 14.4 lists examples of SCBRR settings in synchronous mode. Table 14.3 Bit Rates and SCBRR Settings in Asynchronous Mode P φ (MHz) 5 6 6.144 Bit Rate (bits/s) n N Error ( %) n N Error ( %) n N Error ( %) 110 2 88 –0.25 2 106 –0.44 2 108 0.08 150 2 64 0.16 2 77 0.16 2 79 0.00 300 1 129 0.16 1 155 0.16 1 159 0.00 600 1 64 0.16 1 77 0.16 1 79 0.00 1200 0 129 0.16 0 155 0.16 0 159 0.00 2400 0 64 0.16 0 77 0.16 0 79 0.00 4800 0 32 –1.36 0 38 0.16 0 39 0.00 9600 0 15 1.73 0 19 –2.34 0 19 0.00 19200 0 7 1.73 0 9 –2.34 0 9 0.00 31250 0 4 0.00 0 5 0.00 0 5 2.40 38400 0 3 1.73 0 4 –2.34 0 4 0.00 |
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