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HD6417618A 数据表(PDF) 56 Page - Renesas Technology Corp |
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HD6417618A 数据表(HTML) 56 Page - Renesas Technology Corp |
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56 / 646 page ![]() Section 2 CPU Rev. 6.00 Jun. 12, 2007 Page 24 of 610 REJ09B0131-0600 2.3 Data Formats 2.3.1 Register Data Format The size of register operands is always longwords (32 bits). When loading byte (8 bits) or word (16 bits) data in memory into a register, the data is sign-extended to longword and stored in the register. Longword 31 0 Figure 2.2 Register Data Format 2.3.2 Memory Data Formats Memory data formats are classified into byte, word, and longword. Byte data can be accessed from any address. If word data starting from boundary other than 2n or longword data starting from a boundary other than 4n is accessed, an address error will occur. In such cases, the data accessed cannot be guaranteed. See figure 2.3. Byte 0 Byte 1 Byte 2 Byte 3 Word 0 Word 1 Longword Big endian 31 23 15 7 Address A + 1 Address A + 4 Address A + 8 Address A Address A Address A + 3 Address A + 2 0 Byte 3 Byte 2 Byte 1 Byte 0 Word 1 Word 0 Longword Little endian 31 23 15 7 Address A + 10 Address A + 4 Address A + 8 Address A + 11 Address A Address A + 8 Address A + 9 0 Figure 2.3 Memory Data Format Either big endian and little endian formats can be selected according to the mode pin setting at a reset. For details on mode pin settings, see section 7, Bus State Controller (BSC). |
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