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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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HD6417618A 数据表(PDF) 60 Page - Renesas Technology Corp |
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HD6417618A 数据表(HTML) 60 Page - Renesas Technology Corp |
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60 / 646 page  Section 2 CPU Rev. 6.00 Jun. 12, 2007 Page 28 of 610 REJ09B0131-0600 Table 2.7 Access with Displacement Type CPU in this LSI Example of Other CPUs 16-bit displacement MOV.W @(disp,PC),R0 MOV.W @(R0,R1),R2 ........ .DATA.W H'1234 MOV.W @(H'1234,R1), R2 Note: Immediate data is referenced by @(disp,PC). 2.4.2 Addressing Modes Table 2.8 lists addressing modes and effective address calculation methods. Table 2.8 Addressing Modes and Effective Addresses Addressing Mode Instruction Format Effective Address Calculation Method Calculation Formula Register direct Rn Effective address is register Rn. (Operand is register Rn contents.) Register indirect @Rn Effective address is register Rn contents. Rn Rn Rn Register indirect with post-increment @Rn+ Effective address is register Rn contents. A constant is added to Rn after instruction execution: 1 for a byte operand, 2 for a word operand, 4 for a longword operand. Rn Rn 1/2/4 + Rn + 1/2/4 Rn After instruction execution Byte: Rn + 1 → Rn Word: Rn + 2 → Rn Longword: Rn + 4 → Rn |
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