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HD6417618A 数据表(PDF) 451 Page - Renesas Technology Corp |
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HD6417618A 数据表(HTML) 451 Page - Renesas Technology Corp |
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451 / 646 page ![]() Section 15 Host Interface (HIF) Rev. 6.00 Jun. 12, 2007 Page 419 of 610 REJ09B0131-0600 15.9 Interface When External Device Power is Cut Off When the power supply of an external device interfacing with the HIF is cut off, intermediate levels may be applied to the HIF input pins or the HIF output pins may drive an external device not powered, thus causing the device to be damaged. The HIFEBL pin is provided to prevent this from happening. The system power monitor block controls the HIFEBL pin in synchronization with the cutoff of the external device power so that all HIF pins can be set to the high-impedance state. Figure 15.12 shows an image of high-impedance control of the HIF pins. Tables 15.6 and 15.7 list the input/output control for the HIF pins. HIFCS HIFWR HIFRD HIFD15 to HIFD00 HIFRS HIFMD HIFINT HIFDREQ HIFRDY HIFEBL Figure 15.12 Image of High-Impedance Control of HIF Pins by HIFEBL Pin |
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